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4x4-swittch---verilog

4x4 Crossbar switch implemented in verilog

8mcdma_usermode_loop_test

aes-fpga

AES加密解密算法的Verilog实现

ava

Automatic virtualization of (general) accelerators.

awesome-programming-books-1

📚 经典技术书籍 PDF 文件，持续更新...

aws-fpga

Official repository of the AWS EC2 FPGA Hardware and Software Development Kit

axi

AXI SystemVerilog synthesizable IP modules and verification infrastructure for high-performance on-chip communication

axi-crossbar

An AXI4 crossbar implementation in SystemVerilog

b64.c

Base64 encode/decode

bank_interview

:bank: 银行笔试面试经验分享及资料分享（help you pass the bank interview, and get a amazing bank offer!）

barebones-toolchain

Barebones [ i686-elf / ARMv7-eabi / MIPS ] cross-compiler & toolchain

baselines

OpenAI Baselines: high-quality implementations of reinforcement learning algorithms

benchmarks

A benchmark framework for Tensorflow

benchmarks-1

Use TensorFlow efficiently

book-doc

books and docments

culaunchkernel

Understanding how cuLaunchKernel works

darknet

Convolutional Neural Networks

davos

Distributed Accelerator OS

deepsparse

Neural network inference engine that delivers GPU-class performance for sparsified models on CPUs

dma-proxy

dma-proxy-native

dma_ip_drivers

Xilinx QDMA IP Drivers

dnnweaver2

Open Source Specialized Computing Stack for Accelerating Deep Neural Networks.

embeddedsw

Xilinx Embedded Software (embeddedsw) Development

fpga_decode_bitstream

C code to parse xilinx bitstream. See http://lastweek.io/fpga/bitstream/

gdev

First-Class GPU Resource Management: Device Drivers, Runtimes, and CUDA Compilers for Nouveau.

hp0_2dma_smmu_driver_demo

i2c-controller

image-classification-resnet50

Tensorflow 2.x Image Classification ResNet50 Model

led_shift_count