Comments (5)
Oh! Maybe because that branch has commits not on main!
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6cd00cd ?
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We just switched from sbt format to mill format (like a few days ago) and the change included now formatting more stuff. Perhaps the particular incorrectly formatting change predated that switch to mill format so slipped through the cracks?
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That makes sense, thanks! I think this has been fixed now regardless, but was wondering what happened there!
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Thanks for getting this sorted out. 💯
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Related Issues (20)
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- Modules with `chisel3.experimental.Analog` ports generate error using ChiselSim
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