Is there anything I need to modify when using U250/fpga_100g?

[corundum]

Is there anything I need to modify when using U250/fpga_100g?

[alexforencich]

I think Vivado has been doing a really bad job of placement on the U250. I am working on adding some placement constraints and some pipeline registers on the connection to the CMACs, but I have not committed those changes yet. Unfortunately, it can be a bit of a crapshoot whether or not vivado picks a good placement or a terrible one, and placement constraints only help so much.

[ParkGyuhwan]

Oh, I see. I'll look for a solution to my partial problems. Thank you for your reply and for your hard working on the project. If I have any questions, I will leave you an issue again next time. Thank you very much :)

[alexforencich]

Try https://github.com/alexforencich/corundum and see if that closes timing

[ParkGyuhwan]

I finished executing in Vivado and the timing error disappeared. Thank you very much.