Comments (1)
Hi,
That looks like a version issue with Yosys actually. There were some updates to the btor output of Yosys, so I updated CoSA accordingly. However, you’ll need to update your version of Yosys so they match. Let me know if that still doesn’t fix your issue!
from cosa.
Related Issues (20)
- Brainstorm architecture for keeping CoreIR representation internally
- Brainstorm architecture for a new CoSA API
- Consider using -expose instead of -anyseq in Yosys setundef pass HOT 1
- [btor2] Initialize array with scalar constant HOT 1
- CoSA2? HOT 3
- The problem about installing CoSA. HOT 10
- A question about CoSa and Pono workflow HOT 1
- Unable to access symbols defined within Verilog modules HOT 1
- Possible regression in latest CoSA release (0.2.1) HOT 4
- cosa distributed with older version of bit_vector HOT 6
- Signed arithmetic not handled in internal parser
- Out of date with bit vector HOT 6
- Suggestion: Raw String for Regular Expression
- Parsing errors don’t give line numbers
- Semi-colons in STS can't be next to bit-vector constants HOT 1
- Yosys Verilog Frontend Might Blast Memories to Registers
- Feature Idea: Synchronize clocks HOT 1
- Getting next value of array then accessing is wrong HOT 1
- Enhancement Idea: Use Yosys through Python API HOT 2
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from cosa.