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apollo-11

Original Apollo 11 Guidance Computer (AGC) source code for the command and lunar modules.

async_fifo

A dual clock asynchronous FIFO written in verilog, tested with Icarus Verilog

classicdigitalcircuit

crl

Implementation of the paper "Cascade Residual Learning: A Two-stage Convolutional Neural Network for Stereo Matching"

csi2rx

Open Source 4k CSI-2 Rx core for Xilinx FPGAs

dahengimage

大恒图像源代码管理

doxverilog

Eric's branch of Doxverilog (doxygen + doxverilog patch)

dsitx

MIPI DSI transmitter core for Xilinx FPGAs (work in progress)

edgedetectbyverilog

Use iverilog(compiler) compile file and get edge detect image(bmp file)

fpga-virtual-console

VT220-compatible console on Cyclone IV EP4CE55F23I7

gen_amba

AMBA bus generator including AXI, AHB, and APB

harmonyos

A curated list of awesome things related to HarmonyOS. 华为鸿蒙操作系统。

hls4ml

Machine learning in FPGAs using HLS

hlx_examples

Open Source HLx Examples

keras-yolo3

A Keras implementation of YOLOv3 (Tensorflow backend)

lc-all-solutions

My own leetcode solutions by python

leetcode

mindmap

the mind maps used to record of personal reading or thinking

mipi_csi2_tx

VHDL code for using Xilinx MGT gigabit transceivers/LVDS lines for MIPI CSI-2 TX protocol

ml_embedded_workshop

Machine Language workshop for XDF

myhdl

The MyHDL development repository

myhdl-resources

A collection of awesome MyHDL tutorials, projects and third-party tools.

oh

Silicon proven Verilog library for IC and FPGA designers

opencv-python-tutorial

📖 OpenCV-Python image processing tutorial for beginners

picorv32

PicoRV32 - A Size-Optimized RISC-V CPU

psmnet

Pyramid Stereo Matching Network (CVPR2018)

pycharmproj

pychram github test

python

All Algorithms implemented in Python

riffa

The RIFFA development repository

sata_2_host_controller

Sata 2 Host Controller for FPGA implementation