Name: S Skandha Deepsita
Type: User
Company: @IIITDMKancheepuram , @SMDP-C2SD MeitY
Bio: Chip-design enthusiast, passionate to innovate.
PhD Scholar @IIITDMKancheepuram and Project Associate @SMDP-C2SD, MeitY.
Location: Chennai
Blog: https://www.linkedin.com/in/skandha-deepsita-sarvepalli-027433ba/
S Skandha Deepsita's Projects
MATLAB and HDL models of ACA-CSU approximate adders
Approximate arithmetic circuits for FPGAs
Some verilog implentation on approximate circuits
Energy Efficient Sum -of - Products Circuit
Caravel is a standard SoC hardness with on chip resources to control and read/write operations from a user-dedicated space.
Carry Cut-Back Adder (CCBA) - An approximate adder circuit with artificially-built false timing paths
DeBAM : Decoder Based Approximate multiplier for Low Power Applications
This is a tutorial on standard digital design flow
Library of approximate arithmetic circuits
This project is the fixed point to floating point converter targetted for any DSP operations.
This project is design of 10-bit Potentiometric DAC with Sky-130 PDK
Python-based Hardware Design Processing Toolkit for Verilog HDL
Arduino compatible Risc-V Based SOC
The step by step workflow for automation of RTL to GDSII using Sky-water PDK and open-source tool OpenLane.
Workshop on VLSI/SoC Physical Design concepts mapped with open source tools by VSD.
A design space exploration tool for approximate circuits