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1000base-x icon 1000base-x

1000BASE-X IEEE 802.3-2008 Clause 36 - Physical Coding Sublayer (PCS)

32-bit-multiplier-design-using-transistor-level-digital-gates icon 32-bit-multiplier-design-using-transistor-level-digital-gates

This project was performed on the completion of our B. Tech 4th Semester Summer Training cum Academic Internship Programme on "RISC-V based 32-bit Digital Processor Design using SPICE" under E&ICT Academy IIT Guwahati and Assam Science & Technology University, Guwahati under TEQIP III in association with VLSI Expert

activecore icon activecore

Hardware generation library based on "Kernel IP" (KIP) cores: programmable execution kernels inferred from microarchitectural templates

adl icon adl

Architecture Description Language compiler for Orange C

amaranth icon amaranth

A modern hardware definition language and toolchain based on Python

automated-circuit-designer icon automated-circuit-designer

“AUTOMATED CIRCUIT DESIGNER” can be used to design logic circuits. It reduces the Boolean expression & generate circuit diagram. It makes circuit construction easy & fast.

autowiring icon autowiring

Export an auto wiring build on circuit CAD to svg (Scalable Vector Graphics)

bincopy icon bincopy

Mangling of various file formats that conveys binary information.

ccompiler icon ccompiler

c语言编译器,用 lex 和 yacc 工具完成词法分析与语法分析并生成语法树,C++实现了语 法树的解析并生成中间代码,生成中间代码的过程中实现了错误检测。C++实 现了中间代码的优化操作。之后利用 python 对中间代码进行处理并生成 mips 汇编码并且可以成功在 PCSpim(mips 模拟器)上运行。

cgen icon cgen

LLVM IR code generator from compiled C code

chipkit icon chipkit

CHIPKIT: An agile, reusable open-source framework for rapid test chip development

chips-test icon chips-test

Tests and sample code for https://github.com/floooh/chips

chipyard icon chipyard

An Agile Chisel-Based SoC Design Framework

chisel3 icon chisel3

Chisel 3: A Modern Hardware Design Language

circuit_paths icon circuit_paths

Finding all possible paths between input and output in a given Combinational Circuit.

cmos_rram_addon icon cmos_rram_addon

A design kit add-on for hybrid CMOS-RRAM full-custom exploration. This add-on can be used with any commercial CMOS design kits.

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