Comments (4)
Hi,
The ring size is SoC specific; I'm not sure if the SoC you are using has been tested by us.
Either way, for adjusting, I would suggest to change the according SoC definition, located in https://github.com/FirmWire/FirmWire/blob/main/firmwire/vendor/mtk/soc/__init__.py
The variables to adjust should be SHM_QUEUE_NUM
and SHM_LAYOUT
; Our definition for the MT6765 seems to follow that layout.
If you have a new SoC and it works after adding a definition, we'd happily look forward to a pull request :)
from firmwire.
@mariusmue
How do I determine what goes in SHM_LAYOUT?
I was able to get rid of the error by appending zeroes and increasing SHM_QUEUE_NUM to 17 since the value that is used to index the ringbuffer is 16 but now readPacket() returns None which causes an error.
Here is the firmware: https://drive.google.com/file/d/1sxwNvbu79noHNy4NtQSprBglU8EajYjP/view?usp=sharing
I tried enabling debug for the peripheral but I don't know what to do?
Attached gdb did not work either when I use "-s" then started gdb and then "target remote :1234"
[SP+0x38 == 0x63df6464]: 0x32a836fa00000000 -> 0x32a836fa00000000 -> 0x3c060157 -> 0x00000000
Exception in thread Thread-1:
Traceback (most recent call last):
File "/usr/lib/python3.8/threading.py", line 932, in _bootstrap_inner
self.run()
File "/usr/local/lib/python3.8/dist-packages/avatar2/avatar2.py", line 522, in run
handler(message)
File "/usr/local/lib/python3.8/dist-packages/avatar2/watchmen.py", line 78, in watchtrigger
ret = func(self, *args, **kwargs)
File "/usr/local/lib/python3.8/dist-packages/avatar2/avatar2.py", line 491, in _handle_remote_memory_write_message
success = mem_range.forwarded_to.write_memory(
File "/usr/local/lib/python3.8/dist-packages/avatar2/peripherals/avatar_peripheral.py", line 66, in write_memory
return intervals.pop().data(offset, size, value, **kwargs)
File "/firmwire/firmwire/vendor/mtk/hw/PCCIFPeripheral.py", line 495, in hw_write
packet = bytes(ring.readPacket())
TypeError: cannot convert 'NoneType' object to bytes
==> BOOT [321/1749]
[INFO] firmwire.hw.peripheral.PCCIF_Periph.PCCIF0_MD: boot status: POLLING_BUS_READY
[INFO] firmwire.hw.peripheral.PCCIF_Periph.PCCIF0_MD: boot status: PREINIT_PDAMON
[INFO] firmwire.hw.peripheral.PCCIF_Periph.PCCIF0_MD: boot status: PREINIT_BUSMON
[INFO] firmwire.hw.peripheral.PCCIF_Periph.PCCIF0_MD: boot status: PREINIT_FRC
[INFO] firmwire.hw.peripheral.PCCIF_Periph.PCCIF0_MD: boot status: START_P1
[INFO] firmwire.hw.peripheral.PCCIF_Periph.PCCIF0_MD: boot status: RESTART_WDT
[INFO] firmwire.hw.peripheral.PCCIF_Periph.PCCIF0_MD: boot status: SAVE_RASP
[INFO] firmwire.hw.peripheral.PCCIF_Periph.PCCIF0_MD: boot status: SET_C0_COFIG5_K
[INFO] firmwire.hw.peripheral.PCCIF_Periph.PCCIF0_MD: boot status: CLR_C0_STATUS_BEV_ERL
[INFO] firmwire.hw.peripheral.PCCIF_Periph.PCCIF0_MD: boot status: INTERRUPT_PREINIT
[INFO] firmwire.hw.peripheral.PCCIF_Periph.PCCIF0_MD: boot status: CM_L2_INIT
==> WAIT SHUTDOWN
[INFO] firmwire.hw.peripheral.PCCIF_Periph.PCCIF0_MD: boot status: CM_INIT
[INFO] firmwire.hw.peripheral.PCCIF_Periph.PCCIF0_MD: boot status: PLL_INIT
[INFO] firmwire.hw.peripheral.PCCIF_Periph.PCCIF0_MD: boot status: L1_CACHE_INIT
[INFO] firmwire.hw.peripheral.PCCIF_Periph.PCCIF0_MD: boot status: L2_CACHE_INIT
[INFO] firmwire.hw.peripheral.PCCIF_Periph.PCCIF0_MD: boot status: SET_CM_WT
[INFO] firmwire.hw.peripheral.PCCIF_Periph.PCCIF0_MD: boot status: INIT_OTHER_CORES
[INFO] firmwire.hw.peripheral.PCCIF_Periph.PCCIF0_MD: boot status: SET_BOOTSLAVE
[INFO] firmwire.hw.peripheral.PCCIF_Periph.PCCIF0_MD: boot status: JOIN_CH_DOMAIN
[INFO] firmwire.hw.peripheral.PCCIF_Periph.PCCIF0_MD: boot status: ABN_RST_CHECK
[INFO] firmwire.hw.peripheral.PCCIF_Periph.PCCIF0_MD: boot status: MPU_INIT
[INFO] firmwire.hw.peripheral.PCCIF_Periph.PCCIF0_MD: boot status: START_P2
[INFO] firmwire.hw.peripheral.PCCIF_Periph.PCCIF0_MD: boot status: REGION_INIT
[INFO] firmwire.hw.peripheral.PCCIF_Periph.PCCIF0_MD: boot status: REGION_INIT_DONE
[INFO] firmwire.hw.peripheral.PCCIF_Periph.PCCIF0_MD: boot status: INIT_GPR
[INFO] firmwire.hw.peripheral.PCCIF_Periph.PCCIF0_MD: boot status: SET_C0_EBASE
[INFO] firmwire.hw.peripheral.PCCIF_Periph.PCCIF0_MD: boot status: DISPATCH_SP
[INFO] firmwire.hw.peripheral.PCCIF_Periph.PCCIF0_MD: boot status: STACK_INIT
[INFO] firmwire.hw.peripheral.PCCIF_Periph.PCCIF0_MD: boot status: INIT_VPE1
XXX halted in vpe_sleep helper
XXX halted in vpe_sleep helper
XXX halted in vpe_sleep helper
[INFO] firmwire.vendor.mtk.machine: Quirk: Setting VPE count
[INFO] firmwire.hw.peripheral.PCCIF_Periph.PCCIF0_MD: boot status: CLIB_BASE_INIT
[INFO] firmwire.hw.peripheral.PCCIF_Periph.PCCIF0_MD: boot status: CCCI_HW_INIT
[INFO] firmwire.hw.peripheral.PCCIF_Periph.PCCIF0_MD: boot status: TRACK_HWINIT_START
[WARN] firmwire.hw.peripheral.PCCIF_Periph.PCCIF1_MD: ACKed channels which aren't ready!
[0.44122][NO_TASK] 0x9028c705 [CCCI_ERR] =========>ccci_inst_initr [CCCI_ISNT_INIT]
[0.44193][NO_TASK] 0x9015891f ===> ccci_it_init
[0.44278][NO_TASK] 0x9015891f ===> ccci_it_init initialize ccci_duser_it_port[0]
[INFO] firmwire.hw.peripheral.PCCIF_Periph.PCCIF0_MD: boot status: TRACK_HWINIT_END
[INFO] firmwire.hw.peripheral.PCCIF_Periph.PCCIF0_MD: boot status: CCCI_HS1
[INFO] firmwire.hw.peripheral.PCCIF_Periph.PCCIF0_MD: boot status: TRACK_HS1_START
[INFO] firmwire.hw.peripheral.PCCIF_Periph.PCCIF0_MD: boot status: TRACK_HS1_START_TX
[INFO] firmwire.hw.peripheral.PCCIF_Periph.PCCIF0_MD: FSM: starting boot
[INFO] firmwire.hw.peripheral.PCCIF_Periph.PCCIF0_MD: boot status: TRACK_HS1_START_RX
[INFO] firmwire.hw.peripheral.PCCIF_Periph.PCCIF0_MD: boot status: TRACK_HS1_TX_END
Exception no: 18
Registers:
32
ZERO: 0x0 -> 0x00000000
AT: 0xdeadbeef -> 0xdeadbeef -> 0x00000000
V0: 0x0 -> 0x00000000
from firmwire.
You need to check the corresponding Linux kernel source.
For the MT6765, you can look at https://github.com/xiaomi-mt6765/android_kernel_xiaomi_mt6765/blob/lineage-17.1/drivers/misc/mediatek/eccci/hif/ccci_hif_ccif.c - but the only other values there seem to be equivalent to our MT6768 config. Did you try just copying that one directly? (Or do you have kernel source matching your firmware?)
from firmwire.
thanks for your response.
the kernel version is
MT6765
4.9.190+
QKQ1
Oct 1, 2020 patch level
When I try this the error is ERROR] firmwire.hw.peripheral.PCCIF_Periph.PCCIF0_MD: PCCIF ring no too large (value: 16, is only: 8)
so I had changed it the one with 16 instead but then I get
ERROR] firmwire.hw.peripheral.PCCIF_Periph.PCCIF0_MD: PCCIF ring no too large (value: 16, is only: 16)
I tried appending a 0 to each and changing SHM_QUEUE_NUM from 16 to 17 but then ring.readPacket() receives None irmwire/vendor/mtk/hw/PCCIFPeripheral.py line 495.
Also in the binary amms_pccif_read_from_buffer goes to secpccif_read_sram - is the ring buffer the emulator using in the sram?
from firmwire.
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from firmwire.