Comments (2)
Added a PLL output for 14.4MHz, which makes it 1.8MHz, pretty close.
Original comment by [email protected]
on 29 Jan 2008 at 11:56
- Changed state: Fixed
from vector06cc.
TWO_PLL_OK (enabled) makes clean 1.75MHz from the second clock source, 50MHz
Original comment by [email protected]
on 30 Jan 2008 at 12:59
from vector06cc.
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from vector06cc.