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claziss avatar claziss commented on June 15, 2024

Hi,

From PRM, on brcc instruction:

The branch target is computed as the sum of the branch’s 32-bit word-aligned PC plus the 16-bit halfword aligned displacement value given by the signed 9-bit literal operand (rd).

Thus, you need to align your branch targets by using .align pseudo-op:

	.text
	.global	__start
	.extAuxRegister AUX_DCCM, 0x18, r|w
	.align 4
__start:
	mov_s r0, 0x90000000
	sr r0, [AUX_DCCM]
	mov_s    r0,16
	mov_s    r1,0
	mov_s    r2,1
	.align 4
loop:
	add_s    r0,r0,1
	brlo r0,52,loop

and

	.text
	.global func
	.align 4
func:
	breq    r5, 0, bug
	st      r5, [r0, 24]
	.align 4
bug:
	st      r3, [gp, mysda@sda]

Thanks

from toolchain.

calandoa avatar calandoa commented on June 15, 2024

Thanks for your explanation, I understand now better what is going on.

However, I still think this is a problem in the tools: not in the linker, but actually in the assembler.

Here the assembler is computing the displacement offset based on the address and its 32bit alignement
of the BRxx instruction. But it is assuming that the 32bit alignement in the object file will be the same that the one after linking. This assumption is false.

The assembler should here force the alignment of the current file to be on 32bit when it is processing this kind of instruction ; or issue a warning if no ".align 4" was found, saying it cannot compute the offset in a reliable way.

I am currently compiling code working fine on MetaWare, and I guess this is the default behavior on this tool as there is no "align" in the source file.

from toolchain.

claziss avatar claziss commented on June 15, 2024

Thank you for the suggestion, I'll see what can be done with the respect to that warning.

from toolchain.

calandoa avatar calandoa commented on June 15, 2024

While trying to find for a workaround, the problem is actually simpler than what I expected:
the assembler is not setting any alignment for .text in object files (2**0 as reported by objdump -h).
This is not the behavior I would expect (e.g. arc-elf32-gcc or arm-xxx-as are setting it to 2**2).

For instance, adding one ".byte" in some .text section will force the linker to totally unalign the following code, making it impossible to run.

from toolchain.

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