fw079 Goto Github PK
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fw079's Projects
4way-cache
Verilog cache implementation of 4-way FIFO 16k Cache
adaptive_kernel_methods
Python code for Kernel LMS (KLMS) algorithm with sklearn API. We also implemented neural spike kernels. We also have KLMS and Kernel PCA for neural spike data.
aes-fpga
AES加密解密算法的Verilog实现
asynchronous-fifo
Asynchronous fifo in verilog
chisel3
Chisel 3: A Modern Hardware Design Language
cnn_hardware_acclerator_for_fpga
This is a fully parameterized verilog implementation of computation kernels for accleration of the Inference of Convolutional Neural Networks on FPGAs
computer-systems-ucas
**科学院大学 计算机组成原理FPGA实验课程 - "Five projects to better understand key principles of computer systems", UCAS Spring 2017 Session
cordic
An implementation of the CORDIC algorithm in Verilog.
fft-cordic-hdl
FFT implementation using CORDIC algorithm written in Verilog.
fft_verilog
FFT implement by verilog_测试验证已通过
floating-point-addition
使用Verilog设计的带四舍五入功能的浮点加法器
fpga-tidbits
Chisel components for FPGA projects
fucking-algorithm
刷算法全靠套路，认准 labuladong 就够了！English version supported! Crack LeetCode, not only how, but also why.
gng
Gaussian noise generator Verilog IP core
h264
H264视频解码verilog实现
htop
htop is an interactive text-mode process viewer for Linux. It aims to be a better 'top'.
kafbox
A Matlab benchmarking toolbox for kernel adaptive filtering
kernel-adaptive-filtering-in-python
Implementation of LMS, RLS, KLMS and KRLS filters in Python
lms-adaptive-filter
LMS-Adaptive Filter implement using verilog and Matlab
matrix-multiplication
Design for 4 x 4 Matrix Multiplication using Verilog
nice-klms-qklms
An implementation to "Transfer Learning in Adaptive Filters: The Nearest Instance Centroid-Estimation Kernel Least-Mean-Square Algorithm" with additional work on blood pressure prediction.
ov7670_nexys4_verilog
This code is used to connect the OV7670 Camera to a NEXYS4 and then display the image on a monitor in Verilog
rhubarb-lip-sync
Rhubarb Lip Sync is a command-line tool that automatically creates 2D mouth animation from voice recordings. You can use it for characters in computer games, in animated cartoons, or in any other project that requires animating mouths based on existing recordings.
rosetta
Rapidly deploy Chisel and Vivado HLS accelerators on Xilinx PYNQ
rsaonverilog
Implementation of RSA algorithm on FPGA using Verilog
sobel
Implementation of Sobel Filter in Verilog
softmax
Verilog implementation of Softmax function
sort
排序 verilog 实现
sorting
Verilog implementation of Bubble Sorter and Odd Even Transposition Sorter.
sram
Simple sram controller in verilog.
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