Name: Gabriel Rodríguez Canal
Type: User
Company: The University of Edinburgh
Bio: PhD student at The University of Edinburgh. Focusing on high-level dataflow abstractions for FPGA driven through MLIR/LLVM.
Location: Edinburgh, United Kigndom
Gabriel Rodríguez Canal's Projects
Algorithmic machine that performs insertion sort.
Simple emulator of the Chip-8 interpreter. The emulator receives the game ROM path as an argument. ROMs available at: https://www.zophar.net/pdroms/chip8.html
My solutions to some of the proposed problems at CodinGame
Xilinx Embedded Software (embeddedsw) Development
Runtime-First FPGA Interchange Routing Contest @ FPGA’24
Vitis HLS LLVM source code and examples
The LLVM Project is a collection of modular and reusable compiler and toolchain technologies. Note: the repository does not accept github pull requests at this moment. Please submit your patches at http://reviews.llvm.org.
Linux module that prints memory variables (voluntary project for Structure of Operating Systems subject).
An MLIR-based toolchain for Xilinx Versal AIEngine-based devices.
Nintendo Entertainment System (NES) emulator. Fully working CPU. PPU and APU under development.
A Python Compiler Design Toolkit. Forked for dataflow work at PNNL
Build Customized FPGA Implementations for Vivado
Simple 2D engine for videogames. It is oriented towards education, so everything related to graphics is coded from scratch. For this reason, although functional, it might not be the most efficient implementation.
Stencil with Optimized Dataflow Architecture
STT 465 : Bayesian Statistical Methods (MSU)
This repository contains a tool used to extract data from the Vitis reports used in my research paper. The data considered includes resource utilisation, etc.
Heterogeneous Accelerated Computed Cluster (HACC) Resources Page