haoranyan2022 Goto Github PK

dslogic-hdl

An open source FPGA design for DSLogic

fifo

fpga

数字IC相关资料

fpga-uart

3 modules: UART receiver, UART transmitter, UART to AXI4 master. 3个模块：UART接收器、UART发送器、UART转AXI4交互式调试器

fpga-usb-device

An FPGA-based USB full-speed device core to implement USB-serial, USB-camera, USB-audio, USB-hid, etc. It requires only 3 FPGA common IOs rather than additional chips. 基于FPGA的USB full-speed device端控制器，可实现USB串口、USB摄像头、USB音频、U盘、USB键盘等设备，只需要3个FPGA普通IO，而不需要额外的接口芯片。

guide-of-github

haoranyan2022

Config files for my GitHub profile.

simple_risc_cpu

《Verilog数字系统设计教程-夏宇闻》书中的简易cpu设计

xilinx-fpga-pcie-xdma-tutorial

Xilinx FPGA PCIe 保姆级教程 ——基于 PCIe XDMA IP核