How to fix error; build/X86/gem5.opt configs/example/se.py -c tests/test-progs/hello/bin/x86/linux/hello

[harvard-acc]

How to fix error; build/X86/gem5.opt configs/example/se.py -c tests/test-progs/hello/bin/x86/linux/hello

[xyzsam]

Can you try configs/example/aladdin_se.py instead?

[peterhchen]

i complied already.
I fixed this by:

build/X86/gem5.opt configs/aladdin/aladdin_se.py -c tests/test-progs/hello/bin/x86/linux/hellp

Hello World!
See below attached document/
071_CompileRun_Gem5_Aladdin_C_code_CommonZone_V02.pptx
d!

[peterhchen]

For me, it seems two steps for all designs (written in C code):

1. Use gcc to compile the c code into binary code.
2. Use gem5.opt with aladdin_se.py to setup the X86 architecture.
3. there is addition configuration L1 Cache, L2 Cache, etc. which is independent for step 1 and step 2?

[peterhchen]

Sure. Will try tomorrow

On Mon, Nov 8, 2021 at 1:39 PM Sam Xi ***@***.***> wrote: Can you try configs/example/aladdin_se.py instead? — You are receiving this because you authored the thread. Reply to this email directly, view it on GitHub <#42 (comment)>, or unsubscribe <https://github.com/notifications/unsubscribe-auth/ADBSBD47LXGUCKSXQ4VNNV3ULA7SVANCNFSM5HTW7UTQ> . Triage notifications on the go with GitHub Mobile for iOS <https://apps.apple.com/app/apple-store/id1477376905?ct=notification-email&mt=8&pt=524675> or Android <https://play.google.com/store/apps/details?id=com.github.android&referrer=utm_campaign%3Dnotification-email%26utm_medium%3Demail%26utm_source%3Dgithub>.

-- Sincerely Yours, Peter H. Chen

[peterhchen]

How to modify and compile c code in the integration_test folder? I modify the c file and make. It has the error when include the *h Cannot find the include header in the test_load_store

On Mon, Nov 8, 2021 at 1:39 PM Sam Xi ***@***.***> wrote: Can you try configs/example/aladdin_se.py instead? — You are receiving this because you authored the thread. Reply to this email directly, view it on GitHub <#42 (comment)>, or unsubscribe <https://github.com/notifications/unsubscribe-auth/ADBSBD47LXGUCKSXQ4VNNV3ULA7SVANCNFSM5HTW7UTQ> . Triage notifications on the go with GitHub Mobile for iOS <https://apps.apple.com/app/apple-store/id1477376905?ct=notification-email&mt=8&pt=524675> or Android <https://play.google.com/store/apps/details?id=com.github.android&referrer=utm_campaign%3Dnotification-email%26utm_medium%3Demail%26utm_source%3Dgithub>.

-- Sincerely Yours, Peter H. Chen

[peterhchen]

gem5-aladdin/configs/example: No aladdin_se.py. apu_se.py hmc_hello.py read_config.py sc_main.py arm hmc_tgen.cfg ruby_direct_test.py se.py etrace_replay.py hmctest.py ruby_gpu_random_test.py fs.py memcheck.py ruby_mem_test.py garnet_synth_traffic.py memtest.py ruby_random_test.py

…

On Mon, Nov 8, 2021 at 1:39 PM Sam Xi ***@***.***> wrote: Can you try configs/example/aladdin_se.py instead? — You are receiving this because you authored the thread. Reply to this email directly, view it on GitHub <#42 (comment)>, or unsubscribe <https://github.com/notifications/unsubscribe-auth/ADBSBD47LXGUCKSXQ4VNNV3ULA7SVANCNFSM5HTW7UTQ> . Triage notifications on the go with GitHub Mobile for iOS <https://apps.apple.com/app/apple-store/id1477376905?ct=notification-email&mt=8&pt=524675> or Android <https://play.google.com/store/apps/details?id=com.github.android&referrer=utm_campaign%3Dnotification-email%26utm_medium%3Demail%26utm_source%3Dgithub>.

-- Sincerely Yours, Peter H. Chen

[peterhchen]

Update gem5-aladdin for hello.c Need to understand more on gem5 due to no document can follow for all the tests/ntegration_test cases code modification.

…

On Mon, Nov 8, 2021 at 1:39 PM Sam Xi ***@***.***> wrote: Can you try configs/example/aladdin_se.py instead? — You are receiving this because you authored the thread. Reply to this email directly, view it on GitHub <#42 (comment)>, or unsubscribe <https://github.com/notifications/unsubscribe-auth/ADBSBD47LXGUCKSXQ4VNNV3ULA7SVANCNFSM5HTW7UTQ> . Triage notifications on the go with GitHub Mobile for iOS <https://apps.apple.com/app/apple-store/id1477376905?ct=notification-email&mt=8&pt=524675> or Android <https://play.google.com/store/apps/details?id=com.github.android&referrer=utm_campaign%3Dnotification-email%26utm_medium%3Demail%26utm_source%3Dgithub>.

-- Sincerely Yours, Peter H. Chen

[peterhchen]

In test_load_store.c, how to print a message in the application? printf("Hello test_load_store\n"); compiled and run again with ./run.sh?

…

On Mon, Nov 8, 2021 at 1:39 PM Sam Xi ***@***.***> wrote: Can you try configs/example/aladdin_se.py instead? — You are receiving this because you authored the thread. Reply to this email directly, view it on GitHub <#42 (comment)>, or unsubscribe <https://github.com/notifications/unsubscribe-auth/ADBSBD47LXGUCKSXQ4VNNV3ULA7SVANCNFSM5HTW7UTQ> . Triage notifications on the go with GitHub Mobile for iOS <https://apps.apple.com/app/apple-store/id1477376905?ct=notification-email&mt=8&pt=524675> or Android <https://play.google.com/store/apps/details?id=com.github.android&referrer=utm_campaign%3Dnotification-email%26utm_medium%3Demail%26utm_source%3Dgithub>.

-- Sincerely Yours, Peter H. Chen

[xyzsam]

gem5-aladdin/configs/example:
No aladdin_se.py.

Sorry, I meant configs/aladdin/aladdin_se.py, but you figured this out already.

In test_load_store.c, how to print a message in the application?

printf("Hello test_load_store\n");

Yes.

there is addition configuration L1 Cache, L2 Cache, etc. which is independent for step 1 and step 2?

Yes, it depends on what you want to do. If you just want to adjust the cache sizes on the CPU cluster, there are flags to do this, see here. If you want to modify the cache sizes on the accelerator, this is done via the gem5.cfg file.

I modify the c file and make.
It has the error when include the *h
Cannot find the include header in the test_load_store

Without attaching the patch you made to the file and including instructions on how you are attempting to build, there is no way I can help debug your problem.

[peterhchen]

[image: image.png] 1. I can only build xyzsamgem5-alddin by Python2.7 `which scons` build\X86\gem5.opt 2. No one in my company use "scons build\X86\gem5.opt 3. My company and myself use Ubuntu 20.04, 18.04, Python3 and Python2. Only Python 2.7 can build.

…

On Tue, Nov 9, 2021 at 8:22 PM Sam Xi ***@***.***> wrote: gem5-aladdin/configs/example: No aladdin_se.py. Sorry, I meant configs/aladdin/aladdin_se.py, but you figured this out already. In test_load_store.c, how to print a message in the application? printf("Hello test_load_store\n"); Yes. there is addition configuration L1 Cache, L2 Cache, etc. which is independent for step 1 and step 2? Yes, it depends on what you want to do. If you just want to adjust the cache sizes on the CPU cluster, there are flags to do this, see here <https://github.com/harvard-acc/gem5-aladdin/blob/cdc44d1cee5ad03e5a36bbdfc8d124a68ce5f75a/configs/common/Options.py#L134>. If you want to modify the cache sizes on the accelerator, this is done via the gem5.cfg file. I modify the c file and make. It has the error when include the *h Cannot find the include header in the test_load_store Without attaching the patch you made to the file and including instructions on how you are attempting to build, there is no way I can help debug your problem. — You are receiving this because you authored the thread. Reply to this email directly, view it on GitHub <#42 (comment)>, or unsubscribe <https://github.com/notifications/unsubscribe-auth/ADBSBD7RHUJWCTPAC236ISLULHXO3ANCNFSM5HTW7UTQ> . Triage notifications on the go with GitHub Mobile for iOS <https://apps.apple.com/app/apple-store/id1477376905?ct=notification-email&mt=8&pt=524675> or Android <https://play.google.com/store/apps/details?id=com.github.android&referrer=utm_campaign%3Dnotification-email%26utm_medium%3Demail%26utm_source%3Dgithub>.

-- Sincerely Yours, Peter H. Chen

[peterhchen]

[image: image.png] In the test_load_store directory: I move the binary file into the backup

mv test_load_store test_load_store_backup

First time "make"

make > I got the error message above: cannot find "aladdin_sys_connection.h"

second time "make"

make

No error message:

ls -l

I can see test_load_store-instrumented is generated. I cannot see the "test_load_store" binary file generated. Is the test_load_store-instrunmented (debug) is fine to replace the test_load_store (strip out debug information)?

…

On Tue, Nov 9, 2021 at 8:22 PM Sam Xi ***@***.***> wrote: gem5-aladdin/configs/example: No aladdin_se.py. Sorry, I meant configs/aladdin/aladdin_se.py, but you figured this out already. In test_load_store.c, how to print a message in the application? printf("Hello test_load_store\n"); Yes. there is addition configuration L1 Cache, L2 Cache, etc. which is independent for step 1 and step 2? Yes, it depends on what you want to do. If you just want to adjust the cache sizes on the CPU cluster, there are flags to do this, see here <https://github.com/harvard-acc/gem5-aladdin/blob/cdc44d1cee5ad03e5a36bbdfc8d124a68ce5f75a/configs/common/Options.py#L134>. If you want to modify the cache sizes on the accelerator, this is done via the gem5.cfg file. I modify the c file and make. It has the error when include the *h Cannot find the include header in the test_load_store Without attaching the patch you made to the file and including instructions on how you are attempting to build, there is no way I can help debug your problem. — You are receiving this because you authored the thread. Reply to this email directly, view it on GitHub <#42 (comment)>, or unsubscribe <https://github.com/notifications/unsubscribe-auth/ADBSBD7RHUJWCTPAC236ISLULHXO3ANCNFSM5HTW7UTQ> . Triage notifications on the go with GitHub Mobile for iOS <https://apps.apple.com/app/apple-store/id1477376905?ct=notification-email&mt=8&pt=524675> or Android <https://play.google.com/store/apps/details?id=com.github.android&referrer=utm_campaign%3Dnotification-email%26utm_medium%3Demail%26utm_source%3Dgithub>.

-- Sincerely Yours, Peter H. Chen

[peterhchen]

In the test_dma_load_store directory

./run.sh >> problem 1: the outputs/stats.txt is empty. I cannot find the number of

instructions executed.

mv test_dma_load_store test_dma_load_store_backup make make >> Error message as below. >> The instrumented file is not generated.

[image: image.png]

…

On Tue, Nov 9, 2021 at 8:22 PM Sam Xi ***@***.***> wrote: gem5-aladdin/configs/example: No aladdin_se.py. Sorry, I meant configs/aladdin/aladdin_se.py, but you figured this out already. In test_load_store.c, how to print a message in the application? printf("Hello test_load_store\n"); Yes. there is addition configuration L1 Cache, L2 Cache, etc. which is independent for step 1 and step 2? Yes, it depends on what you want to do. If you just want to adjust the cache sizes on the CPU cluster, there are flags to do this, see here <https://github.com/harvard-acc/gem5-aladdin/blob/cdc44d1cee5ad03e5a36bbdfc8d124a68ce5f75a/configs/common/Options.py#L134>. If you want to modify the cache sizes on the accelerator, this is done via the gem5.cfg file. I modify the c file and make. It has the error when include the *h Cannot find the include header in the test_load_store Without attaching the patch you made to the file and including instructions on how you are attempting to build, there is no way I can help debug your problem. — You are receiving this because you authored the thread. Reply to this email directly, view it on GitHub <#42 (comment)>, or unsubscribe <https://github.com/notifications/unsubscribe-auth/ADBSBD7RHUJWCTPAC236ISLULHXO3ANCNFSM5HTW7UTQ> . Triage notifications on the go with GitHub Mobile for iOS <https://apps.apple.com/app/apple-store/id1477376905?ct=notification-email&mt=8&pt=524675> or Android <https://play.google.com/store/apps/details?id=com.github.android&referrer=utm_campaign%3Dnotification-email%26utm_medium%3Demail%26utm_source%3Dgithub>.

-- Sincerely Yours, Peter H. Chen

[peterhchen]

In test_load_store/Makefile fixed as below. I move the include ../Makefile.gem5 before the test_load_test.c The error goes away.

cp test_load_store.gem5 test_load_store ./runs.sh

It runs. [image: image.png]

…

On Tue, Nov 9, 2021 at 8:22 PM Sam Xi ***@***.***> wrote: gem5-aladdin/configs/example: No aladdin_se.py. Sorry, I meant configs/aladdin/aladdin_se.py, but you figured this out already. In test_load_store.c, how to print a message in the application? printf("Hello test_load_store\n"); Yes. there is addition configuration L1 Cache, L2 Cache, etc. which is independent for step 1 and step 2? Yes, it depends on what you want to do. If you just want to adjust the cache sizes on the CPU cluster, there are flags to do this, see here <https://github.com/harvard-acc/gem5-aladdin/blob/cdc44d1cee5ad03e5a36bbdfc8d124a68ce5f75a/configs/common/Options.py#L134>. If you want to modify the cache sizes on the accelerator, this is done via the gem5.cfg file. I modify the c file and make. It has the error when include the *h Cannot find the include header in the test_load_store Without attaching the patch you made to the file and including instructions on how you are attempting to build, there is no way I can help debug your problem. — You are receiving this because you authored the thread. Reply to this email directly, view it on GitHub <#42 (comment)>, or unsubscribe <https://github.com/notifications/unsubscribe-auth/ADBSBD7RHUJWCTPAC236ISLULHXO3ANCNFSM5HTW7UTQ> . Triage notifications on the go with GitHub Mobile for iOS <https://apps.apple.com/app/apple-store/id1477376905?ct=notification-email&mt=8&pt=524675> or Android <https://play.google.com/store/apps/details?id=com.github.android&referrer=utm_campaign%3Dnotification-email%26utm_medium%3Demail%26utm_source%3Dgithub>.

-- Sincerely Yours, Peter H. Chen

[xyzsam]

The instructions to build the integration tests are not clear, I agree. Here are the Make targets you have available:

• gem5-cpu: Builds a version of the binary that runs on the CPU in gem5
• gem5-accel: Builds a version of the binary that runs the accelerated function in Aladdin and the rest on the CPU.
• gem: Builds both gem5-cpu and gem5-accel.
• dma-trace-binary: Builds a version of the binary that is instrumented with LLVM-Tracer. Run this binary to generate a new dynamic_trace.gz. This binary is NOT meant to be simulated in gem5, so do not replace this with test_load_store - they serve completely different purposes.

So to rebuild and rerun a simulation of one of the integration tests:

> make clean
> make dma-trace-binary
> ./test_load_store-instrumented
# This will generate a new dynamic_trace.gz
> make gem5-accel
> sh run.sh

[peterhchen]

Thanks I will try today Currently, I only type “make” is not good enough. Only test_load_store can run and get both gem5 Ana Aladdin summary report. Others, only gem5 reports. 2-3 tests can not compile by “make” I will have a summary report at end of today.

On Thu, Nov 11, 2021 at 11:20 PM Sam Xi ***@***.***> wrote: The instructions to build the integration tests are not clear, I agree. Here are the Make targets you have available: - gem5-cpu: Builds a version of the binary that runs on the CPU in gem5 - gem5-accel: Builds a version of the binary that runs the accelerated function in Aladdin and the rest on the CPU. - gem: Builds both gem5-cpu and gem5-accel. - dma-trace-binary: Builds a version of the binary that is instrumented with LLVM-Tracer. Run this binary to generate a new dynamic_trace.gz. This binary is NOT meant to be simulated in gem5, so do not replace this with test_load_store - they serve completely different purposes. So to rebuild and rerun a simulation of one of the integration tests: > make clean > make dma-trace-binary > ./test_load_store-instrumented # This will generate a new dynamic_trace.gz > make gem5-accel > sh run.sh — You are receiving this because you authored the thread. Reply to this email directly, view it on GitHub <#42 (comment)>, or unsubscribe <https://github.com/notifications/unsubscribe-auth/ADBSBD4EIYXC3KOFQ6VV7G3ULS53NANCNFSM5HTW7UTQ> . Triage notifications on the go with GitHub Mobile for iOS <https://apps.apple.com/app/apple-store/id1477376905?ct=notification-email&mt=8&pt=524675> or Android <https://play.google.com/store/apps/details?id=com.github.android&referrer=utm_campaign%3Dnotification-email%26utm_medium%3Demail%26utm_source%3Dgithub>.

-- Sincerely Yours, Peter H. Chen

[peterhchen]

I have core dumped at "> sh run.sh". There is not "test_load_store" binary generated before "sh run.sh" [image: image.png] [image: image.png] [image: image.png] [image: image.png]

…

On Thu, Nov 11, 2021 at 11:20 PM Sam Xi ***@***.***> wrote: The instructions to build the integration tests are not clear, I agree. Here are the Make targets you have available: - gem5-cpu: Builds a version of the binary that runs on the CPU in gem5 - gem5-accel: Builds a version of the binary that runs the accelerated function in Aladdin and the rest on the CPU. - gem: Builds both gem5-cpu and gem5-accel. - dma-trace-binary: Builds a version of the binary that is instrumented with LLVM-Tracer. Run this binary to generate a new dynamic_trace.gz. This binary is NOT meant to be simulated in gem5, so do not replace this with test_load_store - they serve completely different purposes. So to rebuild and rerun a simulation of one of the integration tests: > make clean > make dma-trace-binary > ./test_load_store-instrumented # This will generate a new dynamic_trace.gz > make gem5-accel > sh run.sh — You are receiving this because you authored the thread. Reply to this email directly, view it on GitHub <#42 (comment)>, or unsubscribe <https://github.com/notifications/unsubscribe-auth/ADBSBD4EIYXC3KOFQ6VV7G3ULS53NANCNFSM5HTW7UTQ> . Triage notifications on the go with GitHub Mobile for iOS <https://apps.apple.com/app/apple-store/id1477376905?ct=notification-email&mt=8&pt=524675> or Android <https://play.google.com/store/apps/details?id=com.github.android&referrer=utm_campaign%3Dnotification-email%26utm_medium%3Demail%26utm_source%3Dgithub>.

-- Sincerely Yours, Peter H. Chen

[peterhchen]

Attached file which captures all the images step-by-step.

…

On Fri, Nov 12, 2021 at 11:03 AM Peter Chen ***@***.***> wrote: I have core dumped at "> sh run.sh". There is not "test_load_store" binary generated before "sh run.sh" [image: image.png] [image: image.png] [image: image.png] [image: image.png] On Thu, Nov 11, 2021 at 11:20 PM Sam Xi ***@***.***> wrote: > The instructions to build the integration tests are not clear, I agree. > Here are the Make targets you have available: > > - gem5-cpu: Builds a version of the binary that runs on the CPU in > gem5 > - gem5-accel: Builds a version of the binary that runs the > accelerated function in Aladdin and the rest on the CPU. > - gem: Builds both gem5-cpu and gem5-accel. > - dma-trace-binary: Builds a version of the binary that is > instrumented with LLVM-Tracer. Run this binary to generate a new > dynamic_trace.gz. This binary is NOT meant to be simulated in gem5, > so do not replace this with test_load_store - they serve completely > different purposes. > > So to rebuild and rerun a simulation of one of the integration tests: > > > make clean > > make dma-trace-binary > > ./test_load_store-instrumented > # This will generate a new dynamic_trace.gz > > make gem5-accel > > sh run.sh > > — > You are receiving this because you authored the thread. > Reply to this email directly, view it on GitHub > <#42 (comment)>, > or unsubscribe > <https://github.com/notifications/unsubscribe-auth/ADBSBD4EIYXC3KOFQ6VV7G3ULS53NANCNFSM5HTW7UTQ> > . > Triage notifications on the go with GitHub Mobile for iOS > <https://apps.apple.com/app/apple-store/id1477376905?ct=notification-email&mt=8&pt=524675> > or Android > <https://play.google.com/store/apps/details?id=com.github.android&referrer=utm_campaign%3Dnotification-email%26utm_medium%3Demail%26utm_source%3Dgithub>. > > -- Sincerely Yours, Peter H. Chen

-- Sincerely Yours, Peter H. Chen

[peterhchen]

Copy the *gem5_accel into test_load_store.

cp test_load_store-gem5-accel test_load_store

Then

sh run.sh

[image: image.png]

…

On Fri, Nov 12, 2021 at 11:03 AM Peter Chen ***@***.***> wrote: I have core dumped at "> sh run.sh". There is not "test_load_store" binary generated before "sh run.sh" [image: image.png] [image: image.png] [image: image.png] [image: image.png] On Thu, Nov 11, 2021 at 11:20 PM Sam Xi ***@***.***> wrote: > The instructions to build the integration tests are not clear, I agree. > Here are the Make targets you have available: > > - gem5-cpu: Builds a version of the binary that runs on the CPU in > gem5 > - gem5-accel: Builds a version of the binary that runs the > accelerated function in Aladdin and the rest on the CPU. > - gem: Builds both gem5-cpu and gem5-accel. > - dma-trace-binary: Builds a version of the binary that is > instrumented with LLVM-Tracer. Run this binary to generate a new > dynamic_trace.gz. This binary is NOT meant to be simulated in gem5, > so do not replace this with test_load_store - they serve completely > different purposes. > > So to rebuild and rerun a simulation of one of the integration tests: > > > make clean > > make dma-trace-binary > > ./test_load_store-instrumented > # This will generate a new dynamic_trace.gz > > make gem5-accel > > sh run.sh > > — > You are receiving this because you authored the thread. > Reply to this email directly, view it on GitHub > <#42 (comment)>, > or unsubscribe > <https://github.com/notifications/unsubscribe-auth/ADBSBD4EIYXC3KOFQ6VV7G3ULS53NANCNFSM5HTW7UTQ> > . > Triage notifications on the go with GitHub Mobile for iOS > <https://apps.apple.com/app/apple-store/id1477376905?ct=notification-email&mt=8&pt=524675> > or Android > <https://play.google.com/store/apps/details?id=com.github.android&referrer=utm_campaign%3Dnotification-email%26utm_medium%3Demail%26utm_source%3Dgithub>. > > -- Sincerely Yours, Peter H. Chen

-- Sincerely Yours, Peter H. Chen

[peterhchen]

Hi, Sam Xi: I have passed the test_load_store however, in the test_dma_load_store,

make dma-trace-binary

I have undefined reference 'main'. How to fix this problem? [image: image.png] Sincerely, Yours, Peter H. Chen

…

On Fri, Nov 12, 2021 at 11:03 AM Peter Chen ***@***.***> wrote: I have core dumped at "> sh run.sh". There is not "test_load_store" binary generated before "sh run.sh" [image: image.png] [image: image.png] [image: image.png] [image: image.png] On Thu, Nov 11, 2021 at 11:20 PM Sam Xi ***@***.***> wrote: > The instructions to build the integration tests are not clear, I agree. > Here are the Make targets you have available: > > - gem5-cpu: Builds a version of the binary that runs on the CPU in > gem5 > - gem5-accel: Builds a version of the binary that runs the > accelerated function in Aladdin and the rest on the CPU. > - gem: Builds both gem5-cpu and gem5-accel. > - dma-trace-binary: Builds a version of the binary that is > instrumented with LLVM-Tracer. Run this binary to generate a new > dynamic_trace.gz. This binary is NOT meant to be simulated in gem5, > so do not replace this with test_load_store - they serve completely > different purposes. > > So to rebuild and rerun a simulation of one of the integration tests: > > > make clean > > make dma-trace-binary > > ./test_load_store-instrumented > # This will generate a new dynamic_trace.gz > > make gem5-accel > > sh run.sh > > — > You are receiving this because you authored the thread. > Reply to this email directly, view it on GitHub > <#42 (comment)>, > or unsubscribe > <https://github.com/notifications/unsubscribe-auth/ADBSBD4EIYXC3KOFQ6VV7G3ULS53NANCNFSM5HTW7UTQ> > . > Triage notifications on the go with GitHub Mobile for iOS > <https://apps.apple.com/app/apple-store/id1477376905?ct=notification-email&mt=8&pt=524675> > or Android > <https://play.google.com/store/apps/details?id=com.github.android&referrer=utm_campaign%3Dnotification-email%26utm_medium%3Demail%26utm_source%3Dgithub>. > > -- Sincerely Yours, Peter H. Chen

-- Sincerely Yours, Peter H. Chen

[peterhchen]

Hi Dr. Sam Xi: Sorry. My mistakes: Integrations Test Passed: 1. test_load_store 2. test_dma_load_store 3. test_dma_store_order I will test rests. Thanks for your help.

…

On Fri, Nov 12, 2021 at 11:03 AM Peter Chen ***@***.***> wrote: I have core dumped at "> sh run.sh". There is not "test_load_store" binary generated before "sh run.sh" [image: image.png] [image: image.png] [image: image.png] [image: image.png] On Thu, Nov 11, 2021 at 11:20 PM Sam Xi ***@***.***> wrote: > The instructions to build the integration tests are not clear, I agree. > Here are the Make targets you have available: > > - gem5-cpu: Builds a version of the binary that runs on the CPU in > gem5 > - gem5-accel: Builds a version of the binary that runs the > accelerated function in Aladdin and the rest on the CPU. > - gem: Builds both gem5-cpu and gem5-accel. > - dma-trace-binary: Builds a version of the binary that is > instrumented with LLVM-Tracer. Run this binary to generate a new > dynamic_trace.gz. This binary is NOT meant to be simulated in gem5, > so do not replace this with test_load_store - they serve completely > different purposes. > > So to rebuild and rerun a simulation of one of the integration tests: > > > make clean > > make dma-trace-binary > > ./test_load_store-instrumented > # This will generate a new dynamic_trace.gz > > make gem5-accel > > sh run.sh > > — > You are receiving this because you authored the thread. > Reply to this email directly, view it on GitHub > <#42 (comment)>, > or unsubscribe > <https://github.com/notifications/unsubscribe-auth/ADBSBD4EIYXC3KOFQ6VV7G3ULS53NANCNFSM5HTW7UTQ> > . > Triage notifications on the go with GitHub Mobile for iOS > <https://apps.apple.com/app/apple-store/id1477376905?ct=notification-email&mt=8&pt=524675> > or Android > <https://play.google.com/store/apps/details?id=com.github.android&referrer=utm_campaign%3Dnotification-email%26utm_medium%3Demail%26utm_source%3Dgithub>. > > -- Sincerely Yours, Peter H. Chen

-- Sincerely Yours, Peter H. Chen

[peterhchen]

Hi Dr. Sam Xi: How to make test for test_mmap? 2. make dma-trace-binary [image: image.png] 3. ./test_mmap-instrumented There is no dynamic_trace.gz generated. [image: image.png] 4. make gem5-accel

> No rule to make target

[image: image.png]

…

On Fri, Nov 12, 2021 at 11:03 AM Peter Chen ***@***.***> wrote: I have core dumped at "> sh run.sh". There is not "test_load_store" binary generated before "sh run.sh" [image: image.png] [image: image.png] [image: image.png] [image: image.png] On Thu, Nov 11, 2021 at 11:20 PM Sam Xi ***@***.***> wrote: > The instructions to build the integration tests are not clear, I agree. > Here are the Make targets you have available: > > - gem5-cpu: Builds a version of the binary that runs on the CPU in > gem5 > - gem5-accel: Builds a version of the binary that runs the > accelerated function in Aladdin and the rest on the CPU. > - gem: Builds both gem5-cpu and gem5-accel. > - dma-trace-binary: Builds a version of the binary that is > instrumented with LLVM-Tracer. Run this binary to generate a new > dynamic_trace.gz. This binary is NOT meant to be simulated in gem5, > so do not replace this with test_load_store - they serve completely > different purposes. > > So to rebuild and rerun a simulation of one of the integration tests: > > > make clean > > make dma-trace-binary > > ./test_load_store-instrumented > # This will generate a new dynamic_trace.gz > > make gem5-accel > > sh run.sh > > — > You are receiving this because you authored the thread. > Reply to this email directly, view it on GitHub > <#42 (comment)>, > or unsubscribe > <https://github.com/notifications/unsubscribe-auth/ADBSBD4EIYXC3KOFQ6VV7G3ULS53NANCNFSM5HTW7UTQ> > . > Triage notifications on the go with GitHub Mobile for iOS > <https://apps.apple.com/app/apple-store/id1477376905?ct=notification-email&mt=8&pt=524675> > or Android > <https://play.google.com/store/apps/details?id=com.github.android&referrer=utm_campaign%3Dnotification-email%26utm_medium%3Demail%26utm_source%3Dgithub>. > > -- Sincerely Yours, Peter H. Chen

-- Sincerely Yours, Peter H. Chen

[peterhchen]

In test_multiple_accelerators:

sh run.sh

I got the assertion error. [image: image.png]

…

On Tue, Nov 16, 2021 at 9:05 AM Peter Chen ***@***.***> wrote: Hi Dr. Sam Xi: How to make test for test_mmap? 2. make dma-trace-binary [image: image.png] 3. ./test_mmap-instrumented There is no dynamic_trace.gz generated. [image: image.png] 4. make gem5-accel >> No rule to make target [image: image.png] On Fri, Nov 12, 2021 at 11:03 AM Peter Chen ***@***.***> wrote: > I have core dumped at "> sh run.sh". There is not "test_load_store" > binary generated before "sh run.sh" > [image: image.png] > [image: image.png] > [image: image.png] > [image: image.png] > > On Thu, Nov 11, 2021 at 11:20 PM Sam Xi ***@***.***> wrote: > >> The instructions to build the integration tests are not clear, I agree. >> Here are the Make targets you have available: >> >> - gem5-cpu: Builds a version of the binary that runs on the CPU in >> gem5 >> - gem5-accel: Builds a version of the binary that runs the >> accelerated function in Aladdin and the rest on the CPU. >> - gem: Builds both gem5-cpu and gem5-accel. >> - dma-trace-binary: Builds a version of the binary that is >> instrumented with LLVM-Tracer. Run this binary to generate a new >> dynamic_trace.gz. This binary is NOT meant to be simulated in gem5, >> so do not replace this with test_load_store - they serve completely >> different purposes. >> >> So to rebuild and rerun a simulation of one of the integration tests: >> >> > make clean >> > make dma-trace-binary >> > ./test_load_store-instrumented >> # This will generate a new dynamic_trace.gz >> > make gem5-accel >> > sh run.sh >> >> — >> You are receiving this because you authored the thread. >> Reply to this email directly, view it on GitHub >> <#42 (comment)>, >> or unsubscribe >> <https://github.com/notifications/unsubscribe-auth/ADBSBD4EIYXC3KOFQ6VV7G3ULS53NANCNFSM5HTW7UTQ> >> . >> Triage notifications on the go with GitHub Mobile for iOS >> <https://apps.apple.com/app/apple-store/id1477376905?ct=notification-email&mt=8&pt=524675> >> or Android >> <https://play.google.com/store/apps/details?id=com.github.android&referrer=utm_campaign%3Dnotification-email%26utm_medium%3Demail%26utm_source%3Dgithub>. >> >> > > > -- > Sincerely Yours, > Peter H. Chen > -- Sincerely Yours, Peter H. Chen

-- Sincerely Yours, Peter H. Chen

[peterhchen]

Hi Dr Sam Xi: I have finished all the integreation_test 1. test_acp: PASS 2. test_aes: FAIL (Cannot generate trace) [image: image.png] [image: image.png] 3. test_array_func_arg: PASS 4. test_array_func_indexing: PASS 5. test_command_queue: FAIL (Assert Error) [image: image.png] 6. test_da_load_store: PASS 7. test_dma_store_order: PASS 8. test_double_buffering: PASS 9. test_host_load_store: FAIL (Assert Error) [image: image.png] 10. test_hybrid: PASS 11. test_hybrid_simd: PASS 12. test_load_store: PASS 13. test_loop_sampling: PASS 14. test_mmap: FAIL (instrumented cannot generate dynamicTrace.gz) [image: image.png] 15. test_multiple_accelerators: FAIL (Assert Error) [image: image.png] 16. test_multiple_invocations: PASS 17. test_streaming_dma: PASS Sincerely Yours, Peter H. Chen

…

On Tue, Nov 16, 2021 at 9:05 AM Peter Chen ***@***.***> wrote: Hi Dr. Sam Xi: How to make test for test_mmap? 2. make dma-trace-binary [image: image.png] 3. ./test_mmap-instrumented There is no dynamic_trace.gz generated. [image: image.png] 4. make gem5-accel >> No rule to make target [image: image.png] On Fri, Nov 12, 2021 at 11:03 AM Peter Chen ***@***.***> wrote: > I have core dumped at "> sh run.sh". There is not "test_load_store" > binary generated before "sh run.sh" > [image: image.png] > [image: image.png] > [image: image.png] > [image: image.png] > > On Thu, Nov 11, 2021 at 11:20 PM Sam Xi ***@***.***> wrote: > >> The instructions to build the integration tests are not clear, I agree. >> Here are the Make targets you have available: >> >> - gem5-cpu: Builds a version of the binary that runs on the CPU in >> gem5 >> - gem5-accel: Builds a version of the binary that runs the >> accelerated function in Aladdin and the rest on the CPU. >> - gem: Builds both gem5-cpu and gem5-accel. >> - dma-trace-binary: Builds a version of the binary that is >> instrumented with LLVM-Tracer. Run this binary to generate a new >> dynamic_trace.gz. This binary is NOT meant to be simulated in gem5, >> so do not replace this with test_load_store - they serve completely >> different purposes. >> >> So to rebuild and rerun a simulation of one of the integration tests: >> >> > make clean >> > make dma-trace-binary >> > ./test_load_store-instrumented >> # This will generate a new dynamic_trace.gz >> > make gem5-accel >> > sh run.sh >> >> — >> You are receiving this because you authored the thread. >> Reply to this email directly, view it on GitHub >> <#42 (comment)>, >> or unsubscribe >> <https://github.com/notifications/unsubscribe-auth/ADBSBD4EIYXC3KOFQ6VV7G3ULS53NANCNFSM5HTW7UTQ> >> . >> Triage notifications on the go with GitHub Mobile for iOS >> <https://apps.apple.com/app/apple-store/id1477376905?ct=notification-email&mt=8&pt=524675> >> or Android >> <https://play.google.com/store/apps/details?id=com.github.android&referrer=utm_campaign%3Dnotification-email%26utm_medium%3Demail%26utm_source%3Dgithub>. >> >> > > > -- > Sincerely Yours, > Peter H. Chen > -- Sincerely Yours, Peter H. Chen

-- Sincerely Yours, Peter H. Chen

[peterhchen]

Hi, Dr. Sam: We need to generate a dataset for test_load_store. Is there an example to do that? uDockerfile uFROM: gem5-aladdin_autotest (import and included pyTorch ) uWORKDIR /workspace/dataset uCOPY gem5_aladdin_dataset.py . uCOPY gem5_aladdin_parameter.txt . uCMD [“python”, “gem5_aladdin_dataset.py” uIn gem5_aladdin_dataset.py: u1. Parsing gem5_aladdin_parameter.txt u2. Compile C File into Aladdin Trace. u3. Loop using PyTorch RunManager u3.1 Setup parameters u3.2 pyTorch RunManager for parameters looping [Cartesian product = L1 cache (10) x L2 cache (10) x MMU (10) x etc. = 10^Y loop (rows)] u3.3 run.sh u4. Post processing results into load_store_dataset.csv u5. > docker build … u6. Host: docker run u7. Copy from Container to Host: docker cp outputs/load_store_dataset.csv (comma separate value) .

…

On Tue, Nov 16, 2021 at 9:05 AM Peter Chen ***@***.***> wrote: Hi Dr. Sam Xi: How to make test for test_mmap? 2. make dma-trace-binary [image: image.png] 3. ./test_mmap-instrumented There is no dynamic_trace.gz generated. [image: image.png] 4. make gem5-accel >> No rule to make target [image: image.png] On Fri, Nov 12, 2021 at 11:03 AM Peter Chen ***@***.***> wrote: > I have core dumped at "> sh run.sh". There is not "test_load_store" > binary generated before "sh run.sh" > [image: image.png] > [image: image.png] > [image: image.png] > [image: image.png] > > On Thu, Nov 11, 2021 at 11:20 PM Sam Xi ***@***.***> wrote: > >> The instructions to build the integration tests are not clear, I agree. >> Here are the Make targets you have available: >> >> - gem5-cpu: Builds a version of the binary that runs on the CPU in >> gem5 >> - gem5-accel: Builds a version of the binary that runs the >> accelerated function in Aladdin and the rest on the CPU. >> - gem: Builds both gem5-cpu and gem5-accel. >> - dma-trace-binary: Builds a version of the binary that is >> instrumented with LLVM-Tracer. Run this binary to generate a new >> dynamic_trace.gz. This binary is NOT meant to be simulated in gem5, >> so do not replace this with test_load_store - they serve completely >> different purposes. >> >> So to rebuild and rerun a simulation of one of the integration tests: >> >> > make clean >> > make dma-trace-binary >> > ./test_load_store-instrumented >> # This will generate a new dynamic_trace.gz >> > make gem5-accel >> > sh run.sh >> >> — >> You are receiving this because you authored the thread. >> Reply to this email directly, view it on GitHub >> <#42 (comment)>, >> or unsubscribe >> <https://github.com/notifications/unsubscribe-auth/ADBSBD4EIYXC3KOFQ6VV7G3ULS53NANCNFSM5HTW7UTQ> >> . >> Triage notifications on the go with GitHub Mobile for iOS >> <https://apps.apple.com/app/apple-store/id1477376905?ct=notification-email&mt=8&pt=524675> >> or Android >> <https://play.google.com/store/apps/details?id=com.github.android&referrer=utm_campaign%3Dnotification-email%26utm_medium%3Demail%26utm_source%3Dgithub>. >> >> > > > -- > Sincerely Yours, > Peter H. Chen > -- Sincerely Yours, Peter H. Chen

-- Sincerely Yours, Peter H. Chen

[peterhchen]

Hi Dr. Xi: Where can I find the parameters setting document for gem5-aladdin? Below is the only document that I can find from web site: https://harvard-acc.github.io/smaug_docs/run_model_in_simulation.html We need the definitions for: 1. L1, 2, (or 3), Cache: 2. L1, 2, (or 3), Association: 3. L1, 2, (or 3): Cache Line Size: 4. number of CPUs: 5. memory size: 6. multi-threads 7. etc. Where can I find this information? [image: image.png]

…

On Tue, Nov 16, 2021 at 9:05 AM Peter Chen ***@***.***> wrote: Hi Dr. Sam Xi: How to make test for test_mmap? 2. make dma-trace-binary [image: image.png] 3. ./test_mmap-instrumented There is no dynamic_trace.gz generated. [image: image.png] 4. make gem5-accel >> No rule to make target [image: image.png] On Fri, Nov 12, 2021 at 11:03 AM Peter Chen ***@***.***> wrote: > I have core dumped at "> sh run.sh". There is not "test_load_store" > binary generated before "sh run.sh" > [image: image.png] > [image: image.png] > [image: image.png] > [image: image.png] > > On Thu, Nov 11, 2021 at 11:20 PM Sam Xi ***@***.***> wrote: > >> The instructions to build the integration tests are not clear, I agree. >> Here are the Make targets you have available: >> >> - gem5-cpu: Builds a version of the binary that runs on the CPU in >> gem5 >> - gem5-accel: Builds a version of the binary that runs the >> accelerated function in Aladdin and the rest on the CPU. >> - gem: Builds both gem5-cpu and gem5-accel. >> - dma-trace-binary: Builds a version of the binary that is >> instrumented with LLVM-Tracer. Run this binary to generate a new >> dynamic_trace.gz. This binary is NOT meant to be simulated in gem5, >> so do not replace this with test_load_store - they serve completely >> different purposes. >> >> So to rebuild and rerun a simulation of one of the integration tests: >> >> > make clean >> > make dma-trace-binary >> > ./test_load_store-instrumented >> # This will generate a new dynamic_trace.gz >> > make gem5-accel >> > sh run.sh >> >> — >> You are receiving this because you authored the thread. >> Reply to this email directly, view it on GitHub >> <#42 (comment)>, >> or unsubscribe >> <https://github.com/notifications/unsubscribe-auth/ADBSBD4EIYXC3KOFQ6VV7G3ULS53NANCNFSM5HTW7UTQ> >> . >> Triage notifications on the go with GitHub Mobile for iOS >> <https://apps.apple.com/app/apple-store/id1477376905?ct=notification-email&mt=8&pt=524675> >> or Android >> <https://play.google.com/store/apps/details?id=com.github.android&referrer=utm_campaign%3Dnotification-email%26utm_medium%3Demail%26utm_source%3Dgithub>. >> >> > > > -- > Sincerely Yours, > Peter H. Chen > -- Sincerely Yours, Peter H. Chen

-- Sincerely Yours, Peter H. Chen

[peterhchen]

Hi Dr Xi: I made some tests for gem5-aladdin and I found the area never changed as below. The parameters that I used are l11_size, l1i_assoc, l1d_size, l1d_assoc, l2_size, l2_assoc, l3_size, l3_assoc. The ipc (instruction per cycle) and power are fine. Only the area never change. Do you know why? 1. Below is the result: [image: image.png] 2. Below is the sample of run.sh [image: image.png] 3. The document is 003_DatasetGeneration_v03.pptx as the link below: https://github.com/peterhchen/999_gem5_aladdin/tree/main/12_DockerizePythonAPI Peter H. Chen

…

On Mon, Nov 22, 2021 at 10:59 AM Peter Chen ***@***.***> wrote: Hi Dr. Xi: Where can I find the parameters setting document for gem5-aladdin? Below is the only document that I can find from web site: https://harvard-acc.github.io/smaug_docs/run_model_in_simulation.html We need the definitions for: 1. L1, 2, (or 3), Cache: 2. L1, 2, (or 3), Association: 3. L1, 2, (or 3): Cache Line Size: 4. number of CPUs: 5. memory size: 6. multi-threads 7. etc. Where can I find this information? [image: image.png] On Tue, Nov 16, 2021 at 9:05 AM Peter Chen ***@***.***> wrote: > Hi Dr. Sam Xi: > > How to make test for test_mmap? > > 2. make dma-trace-binary > [image: image.png] > 3. ./test_mmap-instrumented > There is no dynamic_trace.gz generated. > [image: image.png] > 4. make gem5-accel > >> No rule to make target > [image: image.png] > > On Fri, Nov 12, 2021 at 11:03 AM Peter Chen ***@***.***> > wrote: > >> I have core dumped at "> sh run.sh". There is not "test_load_store" >> binary generated before "sh run.sh" >> [image: image.png] >> [image: image.png] >> [image: image.png] >> [image: image.png] >> >> On Thu, Nov 11, 2021 at 11:20 PM Sam Xi ***@***.***> >> wrote: >> >>> The instructions to build the integration tests are not clear, I agree. >>> Here are the Make targets you have available: >>> >>> - gem5-cpu: Builds a version of the binary that runs on the CPU in >>> gem5 >>> - gem5-accel: Builds a version of the binary that runs the >>> accelerated function in Aladdin and the rest on the CPU. >>> - gem: Builds both gem5-cpu and gem5-accel. >>> - dma-trace-binary: Builds a version of the binary that is >>> instrumented with LLVM-Tracer. Run this binary to generate a new >>> dynamic_trace.gz. This binary is NOT meant to be simulated in gem5, >>> so do not replace this with test_load_store - they serve completely >>> different purposes. >>> >>> So to rebuild and rerun a simulation of one of the integration tests: >>> >>> > make clean >>> > make dma-trace-binary >>> > ./test_load_store-instrumented >>> # This will generate a new dynamic_trace.gz >>> > make gem5-accel >>> > sh run.sh >>> >>> — >>> You are receiving this because you authored the thread. >>> Reply to this email directly, view it on GitHub >>> <#42 (comment)>, >>> or unsubscribe >>> <https://github.com/notifications/unsubscribe-auth/ADBSBD4EIYXC3KOFQ6VV7G3ULS53NANCNFSM5HTW7UTQ> >>> . >>> Triage notifications on the go with GitHub Mobile for iOS >>> <https://apps.apple.com/app/apple-store/id1477376905?ct=notification-email&mt=8&pt=524675> >>> or Android >>> <https://play.google.com/store/apps/details?id=com.github.android&referrer=utm_campaign%3Dnotification-email%26utm_medium%3Demail%26utm_source%3Dgithub>. >>> >>> >> >> >> -- >> Sincerely Yours, >> Peter H. Chen >> > > > -- > Sincerely Yours, > Peter H. Chen > -- Sincerely Yours, Peter H. Chen

-- Sincerely Yours, Peter H. Chen

[peterhchen]

Hi Dr Xi: I used size bytes in common/test_cacti_cache.cfg to generate different area sizes. The document (003_DatasetGeneration_v05.pptx) https://github.com/peterhchen/999_gem5_aladdin/tree/main/12_DockerizePythonAPI [image: image.png]

…

On Thu, Dec 2, 2021 at 2:44 PM Peter Chen ***@***.***> wrote: Hi Dr Xi: I made some tests for gem5-aladdin and I found the area never changed as below. The parameters that I used are l11_size, l1i_assoc, l1d_size, l1d_assoc, l2_size, l2_assoc, l3_size, l3_assoc. The ipc (instruction per cycle) and power are fine. Only the area never change. Do you know why? 1. Below is the result: [image: image.png] 2. Below is the sample of run.sh [image: image.png] 3. The document is 003_DatasetGeneration_v03.pptx as the link below: https://github.com/peterhchen/999_gem5_aladdin/tree/main/12_DockerizePythonAPI Peter H. Chen On Mon, Nov 22, 2021 at 10:59 AM Peter Chen ***@***.***> wrote: > Hi Dr. Xi: > > Where can I find the parameters setting document for gem5-aladdin? > Below is the only document that I can find from web site: > > https://harvard-acc.github.io/smaug_docs/run_model_in_simulation.html > > We need the definitions for: > 1. L1, 2, (or 3), Cache: > 2. L1, 2, (or 3), Association: > 3. L1, 2, (or 3): Cache Line Size: > 4. number of CPUs: > 5. memory size: > 6. multi-threads > 7. etc. > Where can I find this information? > > [image: image.png] > > > > On Tue, Nov 16, 2021 at 9:05 AM Peter Chen ***@***.***> > wrote: > >> Hi Dr. Sam Xi: >> >> How to make test for test_mmap? >> >> 2. make dma-trace-binary >> [image: image.png] >> 3. ./test_mmap-instrumented >> There is no dynamic_trace.gz generated. >> [image: image.png] >> 4. make gem5-accel >> >> No rule to make target >> [image: image.png] >> >> On Fri, Nov 12, 2021 at 11:03 AM Peter Chen ***@***.***> >> wrote: >> >>> I have core dumped at "> sh run.sh". There is not "test_load_store" >>> binary generated before "sh run.sh" >>> [image: image.png] >>> [image: image.png] >>> [image: image.png] >>> [image: image.png] >>> >>> On Thu, Nov 11, 2021 at 11:20 PM Sam Xi ***@***.***> >>> wrote: >>> >>>> The instructions to build the integration tests are not clear, I >>>> agree. Here are the Make targets you have available: >>>> >>>> - gem5-cpu: Builds a version of the binary that runs on the CPU in >>>> gem5 >>>> - gem5-accel: Builds a version of the binary that runs the >>>> accelerated function in Aladdin and the rest on the CPU. >>>> - gem: Builds both gem5-cpu and gem5-accel. >>>> - dma-trace-binary: Builds a version of the binary that is >>>> instrumented with LLVM-Tracer. Run this binary to generate a new >>>> dynamic_trace.gz. This binary is NOT meant to be simulated in >>>> gem5, so do not replace this with test_load_store - they serve >>>> completely different purposes. >>>> >>>> So to rebuild and rerun a simulation of one of the integration tests: >>>> >>>> > make clean >>>> > make dma-trace-binary >>>> > ./test_load_store-instrumented >>>> # This will generate a new dynamic_trace.gz >>>> > make gem5-accel >>>> > sh run.sh >>>> >>>> — >>>> You are receiving this because you authored the thread. >>>> Reply to this email directly, view it on GitHub >>>> <#42 (comment)>, >>>> or unsubscribe >>>> <https://github.com/notifications/unsubscribe-auth/ADBSBD4EIYXC3KOFQ6VV7G3ULS53NANCNFSM5HTW7UTQ> >>>> . >>>> Triage notifications on the go with GitHub Mobile for iOS >>>> <https://apps.apple.com/app/apple-store/id1477376905?ct=notification-email&mt=8&pt=524675> >>>> or Android >>>> <https://play.google.com/store/apps/details?id=com.github.android&referrer=utm_campaign%3Dnotification-email%26utm_medium%3Demail%26utm_source%3Dgithub>. >>>> >>>> >>> >>> >>> -- >>> Sincerely Yours, >>> Peter H. Chen >>> >> >> >> -- >> Sincerely Yours, >> Peter H. Chen >> > > > -- > Sincerely Yours, > Peter H. Chen > -- Sincerely Yours, Peter H. Chen

-- Sincerely Yours, Peter H. Chen

[peterhchen]

Dear Dr. Xi: In gem5-Aladdin There is a “common” directory set the cache bytes. This cache bytes affect the size of area. There is “with_cpu” directory set up L1, L2, l3, these size are not affect area What are the differences between the cache in common directory and L1, L2, L3 in “with cpu” directory? Peter H Chen

On Thu, Dec 2, 2021 at 2:44 PM Peter Chen ***@***.***> wrote: Hi Dr Xi: I made some tests for gem5-aladdin and I found the area never changed as below. The parameters that I used are l11_size, l1i_assoc, l1d_size, l1d_assoc, l2_size, l2_assoc, l3_size, l3_assoc. The ipc (instruction per cycle) and power are fine. Only the area never change. Do you know why? 1. Below is the result: [image: image.png] 2. Below is the sample of run.sh [image: image.png] 3. The document is 003_DatasetGeneration_v03.pptx as the link below: https://github.com/peterhchen/999_gem5_aladdin/tree/main/12_DockerizePythonAPI Peter H. Chen On Mon, Nov 22, 2021 at 10:59 AM Peter Chen ***@***.***> wrote: > Hi Dr. Xi: > > Where can I find the parameters setting document for gem5-aladdin? > Below is the only document that I can find from web site: > > https://harvard-acc.github.io/smaug_docs/run_model_in_simulation.html > > We need the definitions for: > 1. L1, 2, (or 3), Cache: > 2. L1, 2, (or 3), Association: > 3. L1, 2, (or 3): Cache Line Size: > 4. number of CPUs: > 5. memory size: > 6. multi-threads > 7. etc. > Where can I find this information? > > [image: image.png] > > > > On Tue, Nov 16, 2021 at 9:05 AM Peter Chen ***@***.***> > wrote: > >> Hi Dr. Sam Xi: >> >> How to make test for test_mmap? >> >> 2. make dma-trace-binary >> [image: image.png] >> 3. ./test_mmap-instrumented >> There is no dynamic_trace.gz generated. >> [image: image.png] >> 4. make gem5-accel >> >> No rule to make target >> [image: image.png] >> >> On Fri, Nov 12, 2021 at 11:03 AM Peter Chen ***@***.***> >> wrote: >> >>> I have core dumped at "> sh run.sh". There is not "test_load_store" >>> binary generated before "sh run.sh" >>> [image: image.png] >>> [image: image.png] >>> [image: image.png] >>> [image: image.png] >>> >>> On Thu, Nov 11, 2021 at 11:20 PM Sam Xi ***@***.***> >>> wrote: >>> >>>> The instructions to build the integration tests are not clear, I >>>> agree. Here are the Make targets you have available: >>>> >>>> - gem5-cpu: Builds a version of the binary that runs on the CPU in >>>> gem5 >>>> - gem5-accel: Builds a version of the binary that runs the >>>> accelerated function in Aladdin and the rest on the CPU. >>>> - gem: Builds both gem5-cpu and gem5-accel. >>>> - dma-trace-binary: Builds a version of the binary that is >>>> instrumented with LLVM-Tracer. Run this binary to generate a new >>>> dynamic_trace.gz. This binary is NOT meant to be simulated in >>>> gem5, so do not replace this with test_load_store - they serve >>>> completely different purposes. >>>> >>>> So to rebuild and rerun a simulation of one of the integration tests: >>>> >>>> > make clean >>>> > make dma-trace-binary >>>> > ./test_load_store-instrumented >>>> # This will generate a new dynamic_trace.gz >>>> > make gem5-accel >>>> > sh run.sh >>>> >>>> — >>>> You are receiving this because you authored the thread. >>>> Reply to this email directly, view it on GitHub >>>> <#42 (comment)>, >>>> or unsubscribe >>>> <https://github.com/notifications/unsubscribe-auth/ADBSBD4EIYXC3KOFQ6VV7G3ULS53NANCNFSM5HTW7UTQ> >>>> . >>>> Triage notifications on the go with GitHub Mobile for iOS >>>> <https://apps.apple.com/app/apple-store/id1477376905?ct=notification-email&mt=8&pt=524675> >>>> or Android >>>> <https://play.google.com/store/apps/details?id=com.github.android&referrer=utm_campaign%3Dnotification-email%26utm_medium%3Demail%26utm_source%3Dgithub>. >>>> >>>> >>> >>> >>> -- >>> Sincerely Yours, >>> Peter H. Chen >>> >> >> >> -- >> Sincerely Yours, >> Peter H. Chen >> > > > -- > Sincerely Yours, > Peter H. Chen > -- Sincerely Yours, Peter H. Chen

-- Sincerely Yours, Peter H. Chen

[xyzsam]

For some reason GitHub notifications are not working for me so I was not aware of any of these comments. Sorry for the very delayed response. I just happened to think about this issue today. I've gotten a bit lost on where you are at the moment, but I'll try.

1. test_mmap: this actually does not involve an accelerator, which is why there is no dynamic trace generated. It simply tests that the emulated mmap syscall function works as intended.
2. You have indicated some assertion failures in a few of the integration tests; however, you attached an image, and those images are missing from the comments. Please include the text of the assertion instead of a screenshot.
3. Regarding cache area: this is estimated from CACTI, which requires a configuration file that specifies all the parameters of the cache. Unfortunately this is a poorly integrated aspect of gem5-aladdin: if you change flags like --l1d_size, gem5 does not update the CACTI configuration file, so you don't see any change in area. You'll need to update the config files like test_cacti_cache.cfg, or make a copy of them for your project and set them appropriately.
4. The common directory is simply to store CACTI configuration files that all the integration tests share.

[peterhchen]

Hi Dr Xi: My GitHub should be accessed by anyone. My coworkers and students all can access the documents. 1. Thanks for the answer. I will ignore test_mmap. 2. company machine cannot copy the text out, I can only take the picture and sent to you. 3. For the area, I can change the cacti_cache and get different area. Is there any others? Such as cacti_tlb (table look ahead buffer?) that affect the results? 4. Thanks a lot of information.

On Mon, Dec 6, 2021 at 1:39 PM Sam Xi ***@***.***> wrote: For some reason GitHub notifications are not working for me so I was not aware of any of these comments. Sorry for the very delayed response. I just happened to think about this issue today. I've gotten a bit lost on where you are at the moment, but I'll try. 1. test_mmap: this actually does not involve an accelerator, which is why there is no dynamic trace generated. It simply tests that the emulated mmap syscall function works as intended. 2. You have indicated some assertion failures in a few of the integration tests; however, you attached an image, and those images are missing from the comments. Please include the *text* of the assertion instead of a screenshot. 3. Regarding cache area: this is estimated from CACTI, which requires a configuration file that specifies all the parameters of the cache. Unfortunately this is a poorly integrated aspect of gem5-aladdin: if you change flags like --l1d_size, gem5 does not update the CACTI configuration file, so you don't see any change in area. You'll need to update the config files like test_cacti_cache.cfg, or make a copy of them for your project and set them appropriately. 4. The common directory is simply to store CACTI configuration files that all the integration tests share. — You are receiving this because you authored the thread. Reply to this email directly, view it on GitHub <#42 (comment)>, or unsubscribe <https://github.com/notifications/unsubscribe-auth/ADBSBDYWCVBEJLL2NJZ33VTUPUUP3ANCNFSM5HTW7UTQ> . Triage notifications on the go with GitHub Mobile for iOS <https://apps.apple.com/app/apple-store/id1477376905?ct=notification-email&mt=8&pt=524675> or Android <https://play.google.com/store/apps/details?id=com.github.android&referrer=utm_campaign%3Dnotification-email%26utm_medium%3Demail%26utm_source%3Dgithub>.

-- Sincerely Yours, Peter H. Chen

[peterhchen]

Hi Dr Xi: Some question of the cache: In the test_cacti_cache.cfg, there is "size (bytes) 65536" Is this "size 65536" equal to "the sum of all l1i_size, l1d_size, l2_size, l3_size, etc.?" If not, what is the relationship of "size 65536" with "i_size, l1d_size, l2_size, l3_size, etc."? The above statement is very important for us. Since we built the dataset for DSE (Design Space Exploration), we automize the configuration. We can set the size (bytes) before the run. ==== 3. Regarding cache area: this is estimated from CACTI, which requires a configuration file that specifies all the parameters of the cache. Unfortunately this is a poorly integrated aspect of gem5-aladdin: if you change flags like --l1d_size, gem5 does not update the CACTI configuration file, so you don't see any change in area. You'll need to update the config files like test_cacti_cache.cfg, or make a copy of them for your project and set them appropriately ===

…

On Mon, Dec 6, 2021 at 1:39 PM Sam Xi ***@***.***> wrote: For some reason GitHub notifications are not working for me so I was not aware of any of these comments. Sorry for the very delayed response. I just happened to think about this issue today. I've gotten a bit lost on where you are at the moment, but I'll try. 1. test_mmap: this actually does not involve an accelerator, which is why there is no dynamic trace generated. It simply tests that the emulated mmap syscall function works as intended. 2. You have indicated some assertion failures in a few of the integration tests; however, you attached an image, and those images are missing from the comments. Please include the *text* of the assertion instead of a screenshot. 3. Regarding cache area: this is estimated from CACTI, which requires a configuration file that specifies all the parameters of the cache. Unfortunately this is a poorly integrated aspect of gem5-aladdin: if you change flags like --l1d_size, gem5 does not update the CACTI configuration file, so you don't see any change in area. You'll need to update the config files like test_cacti_cache.cfg, or make a copy of them for your project and set them appropriately. 4. The common directory is simply to store CACTI configuration files that all the integration tests share. — You are receiving this because you authored the thread. Reply to this email directly, view it on GitHub <#42 (comment)>, or unsubscribe <https://github.com/notifications/unsubscribe-auth/ADBSBDYWCVBEJLL2NJZ33VTUPUUP3ANCNFSM5HTW7UTQ> . Triage notifications on the go with GitHub Mobile for iOS <https://apps.apple.com/app/apple-store/id1477376905?ct=notification-email&mt=8&pt=524675> or Android <https://play.google.com/store/apps/details?id=com.github.android&referrer=utm_campaign%3Dnotification-email%26utm_medium%3Demail%26utm_source%3Dgithub>.

-- Sincerely Yours, Peter H. Chen

[peterhchen]

Hi Dr. Xi: There in the common directory, there are cache.cfg, lq.cfg (Load Queue), sq.cfg (Store Queue), and tlb.cfg (table lookahead buffer). Which parameters in run.sh will be associated with these sizes?, such as, l1i, l1d, l2, l3 size sum to get cache size? and etc? This information is very important for our Design Space Exploration. Sincerely Yours, Peter H, Chen

…

On Mon, Dec 6, 2021 at 1:39 PM Sam Xi ***@***.***> wrote: For some reason GitHub notifications are not working for me so I was not aware of any of these comments. Sorry for the very delayed response. I just happened to think about this issue today. I've gotten a bit lost on where you are at the moment, but I'll try. 1. test_mmap: this actually does not involve an accelerator, which is why there is no dynamic trace generated. It simply tests that the emulated mmap syscall function works as intended. 2. You have indicated some assertion failures in a few of the integration tests; however, you attached an image, and those images are missing from the comments. Please include the *text* of the assertion instead of a screenshot. 3. Regarding cache area: this is estimated from CACTI, which requires a configuration file that specifies all the parameters of the cache. Unfortunately this is a poorly integrated aspect of gem5-aladdin: if you change flags like --l1d_size, gem5 does not update the CACTI configuration file, so you don't see any change in area. You'll need to update the config files like test_cacti_cache.cfg, or make a copy of them for your project and set them appropriately. 4. The common directory is simply to store CACTI configuration files that all the integration tests share. — You are receiving this because you authored the thread. Reply to this email directly, view it on GitHub <#42 (comment)>, or unsubscribe <https://github.com/notifications/unsubscribe-auth/ADBSBDYWCVBEJLL2NJZ33VTUPUUP3ANCNFSM5HTW7UTQ> . Triage notifications on the go with GitHub Mobile for iOS <https://apps.apple.com/app/apple-store/id1477376905?ct=notification-email&mt=8&pt=524675> or Android <https://play.google.com/store/apps/details?id=com.github.android&referrer=utm_campaign%3Dnotification-email%26utm_medium%3Demail%26utm_source%3Dgithub>.

-- Sincerely Yours, Peter H. Chen

[xyzsam]

Is this "size 65536" equal to "the sum of all l1i_size, l1d_size, l2_size,
l3_size, etc.?"
If not, what is the relationship of "size 65536" with "i_size, l1d_size,
l2_size, l3_size, etc."?

This is just the size for the L1 cache for the accelerator. It has nothing to do with i_size, l1d_size, etc - those are for the CPU. The L1 cache for the accelerator (if it is used) is configured via the gem5.cfg file.

It's possible for you to add more caches to your accelerator but for power modeling purposes in Aladdin, we only handle the first level cache (there's an infinite number of possibilities).

Regarding cache area: this is estimated from CACTI, which requires a
configuration file that specifies all the parameters of the cache.
Unfortunately this is a poorly integrated aspect of gem5-aladdin: if you
change flags like --l1d_size, gem5 does not update the CACTI configuration
file, so you don't see any change in area. You'll need to update the config
files like test_cacti_cache.cfg, or make a copy of them for your project
and set them appropriately

Indeed, this is not well integrated; however, note that by default, gem5 does not provide any power modeling capabilities to begin with. All those flags you mentioned apply to the CPUs, not to the accelerators. gem5-aladdin only models power for the accelerator subsystem; if you want to include CPU power you'll need to handle that yourself. I wrote a ton of scripts in the past to do this for my projects (but they're not very reusable and I don't have access to them anymore).

There in the common directory, there are cache.cfg, lq.cfg (Load Queue),
sq.cfg (Store Queue), and tlb.cfg (table lookahead buffer).
Which parameters in run.sh will be associated with these sizes?, such as,
l1i, l1d, l2, l3 size sum to get cache size? and etc?

These are all set in the gem5.cfg file. They apply to the accelerator only, and ONLY when using the caches instead of scratchpads for local memory.

[peterhchen]

Thanks a lot

On Thu, Dec 9, 2021 at 12:18 AM Sam Xi ***@***.***> wrote: Is this "size 65536" equal to "the sum of all l1i_size, l1d_size, l2_size, l3_size, etc.?" If not, what is the relationship of "size 65536" with "i_size, l1d_size, l2_size, l3_size, etc."? This is just the size for the L1 cache *for the accelerator*. It has nothing to do with i_size, l1d_size, etc - those are for the CPU. The L1 cache for the accelerator (if it is used) is configured via the gem5.cfg file. It's possible for you to add more caches to your accelerator but for power modeling purposes in Aladdin, we only handle the first level cache (there's an infinite number of possibilities). Regarding cache area: this is estimated from CACTI, which requires a configuration file that specifies all the parameters of the cache. Unfortunately this is a poorly integrated aspect of gem5-aladdin: if you change flags like --l1d_size, gem5 does not update the CACTI configuration file, so you don't see any change in area. You'll need to update the config files like test_cacti_cache.cfg, or make a copy of them for your project and set them appropriately Indeed, this is not well integrated; however, note that by default, gem5 does not provide any power modeling capabilities to begin with. All those flags you mentioned apply to the CPUs, not to the accelerators. gem5-aladdin only models power for the accelerator subsystem; if you want to include CPU power you'll need to handle that yourself. I wrote a ton of scripts in the past to do this for my projects (but they're not very reusable and I don't have access to them anymore). There in the common directory, there are cache.cfg, lq.cfg (Load Queue), sq.cfg (Store Queue), and tlb.cfg (table lookahead buffer). Which parameters in run.sh will be associated with these sizes?, such as, l1i, l1d, l2, l3 size sum to get cache size? and etc? These are all set in the gem5.cfg file. They apply to the accelerator only, and ONLY when using the caches instead of scratchpads for local memory. — You are receiving this because you authored the thread. Reply to this email directly, view it on GitHub <#42 (comment)>, or unsubscribe <https://github.com/notifications/unsubscribe-auth/ADBSBDYUQOTUMVRXX4B2HX3UQBQ65ANCNFSM5HTW7UTQ> . Triage notifications on the go with GitHub Mobile for iOS <https://apps.apple.com/app/apple-store/id1477376905?ct=notification-email&mt=8&pt=524675> or Android <https://play.google.com/store/apps/details?id=com.github.android&referrer=utm_campaign%3Dnotification-email%26utm_medium%3Demail%26utm_source%3Dgithub>.

-- Sincerely Yours, Peter H. Chen

[peterhchen]

Hi Dr Xi Current xyzsam/gem5-Aladdin support intel based X86 architecture with

python2.7 $(which scons) /build/X86/gem5.opt

How to gem5.opt for ARM/RISCV architecture? Sincerely yours, Peter H Chen

On Thu, Dec 9, 2021 at 12:18 AM Sam Xi ***@***.***> wrote: Is this "size 65536" equal to "the sum of all l1i_size, l1d_size, l2_size, l3_size, etc.?" If not, what is the relationship of "size 65536" with "i_size, l1d_size, l2_size, l3_size, etc."? This is just the size for the L1 cache *for the accelerator*. It has nothing to do with i_size, l1d_size, etc - those are for the CPU. The L1 cache for the accelerator (if it is used) is configured via the gem5.cfg file. It's possible for you to add more caches to your accelerator but for power modeling purposes in Aladdin, we only handle the first level cache (there's an infinite number of possibilities). Regarding cache area: this is estimated from CACTI, which requires a configuration file that specifies all the parameters of the cache. Unfortunately this is a poorly integrated aspect of gem5-aladdin: if you change flags like --l1d_size, gem5 does not update the CACTI configuration file, so you don't see any change in area. You'll need to update the config files like test_cacti_cache.cfg, or make a copy of them for your project and set them appropriately Indeed, this is not well integrated; however, note that by default, gem5 does not provide any power modeling capabilities to begin with. All those flags you mentioned apply to the CPUs, not to the accelerators. gem5-aladdin only models power for the accelerator subsystem; if you want to include CPU power you'll need to handle that yourself. I wrote a ton of scripts in the past to do this for my projects (but they're not very reusable and I don't have access to them anymore). There in the common directory, there are cache.cfg, lq.cfg (Load Queue), sq.cfg (Store Queue), and tlb.cfg (table lookahead buffer). Which parameters in run.sh will be associated with these sizes?, such as, l1i, l1d, l2, l3 size sum to get cache size? and etc? These are all set in the gem5.cfg file. They apply to the accelerator only, and ONLY when using the caches instead of scratchpads for local memory. — You are receiving this because you authored the thread. Reply to this email directly, view it on GitHub <#42 (comment)>, or unsubscribe <https://github.com/notifications/unsubscribe-auth/ADBSBDYUQOTUMVRXX4B2HX3UQBQ65ANCNFSM5HTW7UTQ> . Triage notifications on the go with GitHub Mobile for iOS <https://apps.apple.com/app/apple-store/id1477376905?ct=notification-email&mt=8&pt=524675> or Android <https://play.google.com/store/apps/details?id=com.github.android&referrer=utm_campaign%3Dnotification-email%26utm_medium%3Demail%26utm_source%3Dgithub>.

-- Sincerely Yours, Peter H. Chen

[xyzsam]

gem5-aladdin does not support ARM or RISC-V and we don't have plans to add support. Although that is a popular feature request, it's not something we have the time to commit to building and maintaining, unfortunately.

[peterhchen]

Thanks Dr Xi All iPhone and TSMC fab need ARM based RISCV architecture. It is reduced instructions for reduce power in IPhone. I would recommend gen5-Aladdin considering RISCV for industrial requirements. I have forwarded your message to upper management. Thanks Peter H. Chen

On Mon, Dec 20, 2021 at 8:15 AM Sam Xi ***@***.***> wrote: gem5-aladdin does not support ARM or RISC-V and we don't have plans to add support. Although that is a popular feature request, it's not something we have the time to commit to building and maintaining, unfortunately. — Reply to this email directly, view it on GitHub <#42 (comment)>, or unsubscribe <https://github.com/notifications/unsubscribe-auth/ADBSBD3VPDMVBJCAYY7PBRDUR5JAVANCNFSM5HTW7UTQ> . Triage notifications on the go with GitHub Mobile for iOS <https://apps.apple.com/app/apple-store/id1477376905?ct=notification-email&mt=8&pt=524675> or Android <https://play.google.com/store/apps/details?id=com.github.android&referrer=utm_campaign%3Dnotification-email%26utm_medium%3Demail%26utm_source%3Dgithub>. You are receiving this because you authored the thread.Message ID: ***@***.***>

-- Sincerely Yours, Peter H. Chen

[peterhchen]

I just talked to my manager. 1. He said the gem5-aladdin applied to all architectures for Performance, Area, and Power simulation 2. X86 is just the running platform which we are currently using right now. 3. We do not need ARM/RISCV architecture Are the statement 1 and 3 true? If it is true, then we do not need ARM/RISCV architecture. Sorry for the confusing. Sincerely Yours, Peter H. Chen

…

On Mon, Dec 20, 2021 at 8:15 AM Sam Xi ***@***.***> wrote: gem5-aladdin does not support ARM or RISC-V and we don't have plans to add support. Although that is a popular feature request, it's not something we have the time to commit to building and maintaining, unfortunately. — Reply to this email directly, view it on GitHub <#42 (comment)>, or unsubscribe <https://github.com/notifications/unsubscribe-auth/ADBSBD3VPDMVBJCAYY7PBRDUR5JAVANCNFSM5HTW7UTQ> . Triage notifications on the go with GitHub Mobile for iOS <https://apps.apple.com/app/apple-store/id1477376905?ct=notification-email&mt=8&pt=524675> or Android <https://play.google.com/store/apps/details?id=com.github.android&referrer=utm_campaign%3Dnotification-email%26utm_medium%3Demail%26utm_source%3Dgithub>. You are receiving this because you authored the thread.Message ID: ***@***.***>

-- Sincerely Yours, Peter H. Chen

[xyzsam]

I assume you want to simulate a workload running on an ARM or RISC-V system. If so, then the answer is no, we do not support it. X86 as you have described ("the running platform we are currenlty using right now") is the host architecture. That does not matter here as you can compile gem5 to run on an ARM system too. What matters is the simulated architecture. We only support simulating X86.

[peterhchen]

Thanks a lot

On Wed, Dec 22, 2021 at 9:38 AM Sam Xi ***@***.***> wrote: I assume you want to simulate a workload running on an ARM or RISC-V system. If so, then the answer is no, we do not support it. X86 as you have described ("the running platform we are currenlty using right now") is the *host* architecture. That does not matter here as you can compile gem5 to run on an ARM system too. What matters is the *simulated* architecture. We only support simulating X86. — Reply to this email directly, view it on GitHub <#42 (comment)>, or unsubscribe <https://github.com/notifications/unsubscribe-auth/ADBSBDYCQXKF5XJIS47XD2LUSIEIJANCNFSM5HTW7UTQ> . Triage notifications on the go with GitHub Mobile for iOS <https://apps.apple.com/app/apple-store/id1477376905?ct=notification-email&mt=8&pt=524675> or Android <https://play.google.com/store/apps/details?id=com.github.android&referrer=utm_campaign%3Dnotification-email%26utm_medium%3Demail%26utm_source%3Dgithub>. You are receiving this because you authored the thread.Message ID: ***@***.***>

-- Sincerely Yours, Peter H. Chen

[peterhchen]

Hi Dr. Xi: One of our managers question: Allen: Could we modify it for RISC-V or use it for partial structure studies like cache ? I think that is Richard thinking. Note: 1. Richard is our team manager. 2. The Allen question: 2.1) Our running station is Intel X86 based. But the Accelerator design is ARM based RISC V. Can Gem5-aladdin do simulation (Instruction performance, Power consumption, and Area)? 2.2) For iPhone, both CPU and Accelerator are ARM based RISC V. From your previous mail, gem5-aladdin can not do simulation, right? Sincerely Yours, Peter H. Chen

…

On Wed, Dec 22, 2021 at 9:38 AM Sam Xi ***@***.***> wrote: I assume you want to simulate a workload running on an ARM or RISC-V system. If so, then the answer is no, we do not support it. X86 as you have described ("the running platform we are currenlty using right now") is the *host* architecture. That does not matter here as you can compile gem5 to run on an ARM system too. What matters is the *simulated* architecture. We only support simulating X86. — Reply to this email directly, view it on GitHub <#42 (comment)>, or unsubscribe <https://github.com/notifications/unsubscribe-auth/ADBSBDYCQXKF5XJIS47XD2LUSIEIJANCNFSM5HTW7UTQ> . Triage notifications on the go with GitHub Mobile for iOS <https://apps.apple.com/app/apple-store/id1477376905?ct=notification-email&mt=8&pt=524675> or Android <https://play.google.com/store/apps/details?id=com.github.android&referrer=utm_campaign%3Dnotification-email%26utm_medium%3Demail%26utm_source%3Dgithub>. You are receiving this because you authored the thread.Message ID: ***@***.***>

-- Sincerely Yours, Peter H. Chen

[xyzsam]

The purpose of using gem5-aladdin instead of regular gem5 is the ability to simulate loosely-attached accelerators in the SoC. The CPU needs to communicate with the accelerator. For this, we have only tested with X86. It's possible to make this work with other ISAs of course, but we don't have the time to do it, and I'm not sure how much effort would be required.

[peterhchen]

Thanks

On Tue, Dec 28, 2021 at 11:38 AM Sam Xi ***@***.***> wrote: The purpose of using gem5-aladdin instead of regular gem5 is the ability to simulate loosely-attached accelerators in the SoC. The CPU needs to communicate with the accelerator. For this, we have only tested with X86. It's possible to make this work with other ISAs of course, but we don't have the time to do it, and I'm not sure how much effort would be required. — Reply to this email directly, view it on GitHub <#42 (comment)>, or unsubscribe <https://github.com/notifications/unsubscribe-auth/ADBSBD2MSF2XFAHZGQSEE4LUTIG3RANCNFSM5HTW7UTQ> . Triage notifications on the go with GitHub Mobile for iOS <https://apps.apple.com/app/apple-store/id1477376905?ct=notification-email&mt=8&pt=524675> or Android <https://play.google.com/store/apps/details?id=com.github.android&referrer=utm_campaign%3Dnotification-email%26utm_medium%3Demail%26utm_source%3Dgithub>. You are receiving this because you authored the thread.Message ID: ***@***.***>

-- Sincerely Yours, Peter H. Chen

[peterhchen]

Hi, prof Xi: I test l3_size and L3_assoc. There is no effect for L3_size and L3_assoc? Are they correct? l1i_size/assoc, lid+size/assoc, l2_size/l2_assoc all the effect to IPC. [image: image.png] Sincerely Yours, Peter H. Chen

…

On Thu, Dec 9, 2021 at 12:18 AM Sam Xi ***@***.***> wrote: Is this "size 65536" equal to "the sum of all l1i_size, l1d_size, l2_size, l3_size, etc.?" If not, what is the relationship of "size 65536" with "i_size, l1d_size, l2_size, l3_size, etc."? This is just the size for the L1 cache *for the accelerator*. It has nothing to do with i_size, l1d_size, etc - those are for the CPU. The L1 cache for the accelerator (if it is used) is configured via the gem5.cfg file. It's possible for you to add more caches to your accelerator but for power modeling purposes in Aladdin, we only handle the first level cache (there's an infinite number of possibilities). Regarding cache area: this is estimated from CACTI, which requires a configuration file that specifies all the parameters of the cache. Unfortunately this is a poorly integrated aspect of gem5-aladdin: if you change flags like --l1d_size, gem5 does not update the CACTI configuration file, so you don't see any change in area. You'll need to update the config files like test_cacti_cache.cfg, or make a copy of them for your project and set them appropriately Indeed, this is not well integrated; however, note that by default, gem5 does not provide any power modeling capabilities to begin with. All those flags you mentioned apply to the CPUs, not to the accelerators. gem5-aladdin only models power for the accelerator subsystem; if you want to include CPU power you'll need to handle that yourself. I wrote a ton of scripts in the past to do this for my projects (but they're not very reusable and I don't have access to them anymore). There in the common directory, there are cache.cfg, lq.cfg (Load Queue), sq.cfg (Store Queue), and tlb.cfg (table lookahead buffer). Which parameters in run.sh will be associated with these sizes?, such as, l1i, l1d, l2, l3 size sum to get cache size? and etc? These are all set in the gem5.cfg file. They apply to the accelerator only, and ONLY when using the caches instead of scratchpads for local memory. — You are receiving this because you authored the thread. Reply to this email directly, view it on GitHub <#42 (comment)>, or unsubscribe <https://github.com/notifications/unsubscribe-auth/ADBSBDYUQOTUMVRXX4B2HX3UQBQ65ANCNFSM5HTW7UTQ> . Triage notifications on the go with GitHub Mobile for iOS <https://apps.apple.com/app/apple-store/id1477376905?ct=notification-email&mt=8&pt=524675> or Android <https://play.google.com/store/apps/details?id=com.github.android&referrer=utm_campaign%3Dnotification-email%26utm_medium%3Demail%26utm_source%3Dgithub>.

-- Sincerely Yours, Peter H. Chen

[peterhchen]

Hi Professor Xi: 1. In addition to cacti tlb size, lq size, sq size, l3_size, and l3_assoc have no effect on output. 2. The following gem5-aladdin feature parameters (num_l2cashes, num_l3caches) have no effects on the results (ipc, power, oe area). I want to make sure that my interface APIs to gem5-aladdin are correct. [image: image.png] 3. For CUP type: only DerivO3CPU and TimingSimpleCPU worked. Others, caused the core dumped in test_store_load.c [image: image.png] 4. For the memory type below, the OK list are worked. Others causes core dumped in test_load_store.c [image: image.png] 5. If I did any mistake testing, please let me know. 6. I will based on 1-4 to implement the seaboran plot, PCA (Principal Component Analysis), Pareto plot, and Hypermapper Multi-Objective optimization. Sincerely Yours, Peter H. Chen

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On Sun, Feb 6, 2022 at 5:37 PM Peter Chen ***@***.***> wrote: Hi, prof Xi: I test l3_size and L3_assoc. There is no effect for L3_size and L3_assoc? Are they correct? l1i_size/assoc, lid+size/assoc, l2_size/l2_assoc all the effect to IPC. [image: image.png] Sincerely Yours, Peter H. Chen On Thu, Dec 9, 2021 at 12:18 AM Sam Xi ***@***.***> wrote: > Is this "size 65536" equal to "the sum of all l1i_size, l1d_size, l2_size, > l3_size, etc.?" > If not, what is the relationship of "size 65536" with "i_size, l1d_size, > l2_size, l3_size, etc."? > > This is just the size for the L1 cache *for the accelerator*. It has > nothing to do with i_size, l1d_size, etc - those are for the CPU. The L1 > cache for the accelerator (if it is used) is configured via the gem5.cfg > file. > > It's possible for you to add more caches to your accelerator but for > power modeling purposes in Aladdin, we only handle the first level cache > (there's an infinite number of possibilities). > > Regarding cache area: this is estimated from CACTI, which requires a > configuration file that specifies all the parameters of the cache. > Unfortunately this is a poorly integrated aspect of gem5-aladdin: if you > change flags like --l1d_size, gem5 does not update the CACTI configuration > file, so you don't see any change in area. You'll need to update the > config > files like test_cacti_cache.cfg, or make a copy of them for your project > and set them appropriately > > Indeed, this is not well integrated; however, note that by default, gem5 > does not provide any power modeling capabilities to begin with. All those > flags you mentioned apply to the CPUs, not to the accelerators. > gem5-aladdin only models power for the accelerator subsystem; if you want > to include CPU power you'll need to handle that yourself. I wrote a ton of > scripts in the past to do this for my projects (but they're not very > reusable and I don't have access to them anymore). > > There in the common directory, there are cache.cfg, lq.cfg (Load Queue), > sq.cfg (Store Queue), and tlb.cfg (table lookahead buffer). > Which parameters in run.sh will be associated with these sizes?, such as, > l1i, l1d, l2, l3 size sum to get cache size? and etc? > > These are all set in the gem5.cfg file. They apply to the accelerator > only, and ONLY when using the caches instead of scratchpads for local > memory. > > — > You are receiving this because you authored the thread. > Reply to this email directly, view it on GitHub > <#42 (comment)>, > or unsubscribe > <https://github.com/notifications/unsubscribe-auth/ADBSBDYUQOTUMVRXX4B2HX3UQBQ65ANCNFSM5HTW7UTQ> > . > Triage notifications on the go with GitHub Mobile for iOS > <https://apps.apple.com/app/apple-store/id1477376905?ct=notification-email&mt=8&pt=524675> > or Android > <https://play.google.com/store/apps/details?id=com.github.android&referrer=utm_campaign%3Dnotification-email%26utm_medium%3Demail%26utm_source%3Dgithub>. > > -- Sincerely Yours, Peter H. Chen

-- Sincerely Yours, Peter H. Chen

[xyzsam]

I test l3_size and L3_assoc. There is no effect for L3_size and L3_assoc?

gem5-aladdin's default system only contains L1 and L2 caches. You can modify this yourself to add a third level cache if you want.

cacti tlb size, lq size, sq size, l3_size, and l3_assoc have no effect on output.

The CACTI config files are only used for power estimation. If you want to see the effect on IPC, you need to change them in gem5.cfg.

For CUP type: only DerivO3CPU and TimingSimpleCPU worked. Others, caused the core dumped in test_store_load.c [image: image.png]

Again, I cannot see the image you attached, please paste the text of the core dump. I know we use one CPU type for fast forwarding and another for detailed simulation.

For the memory type below, the OK list are worked. Others causes core dumped in test_load_store.c [image: image.png]

Again, cannot see the image. Please paste the text of the error, not a screenshot.

[peterhchen]

1. gem5-aladdin's default system only contains L1 and L2 caches. You can modify this yourself to add a third level cache if you want. cacti tlb size, lq size, sq size, l3_size, and l3_assoc have no effect on output. Question: 1.1 I only use docker samxyz image. I compile the application based on the Professor Xi script given to me. 1.2 I do not know how to modify the gem5-aladdin code, do I need to modify and recompile gem5-aladdin code? 2. cacti tlb size, lq size, sq size, l3_size, and l3_assoc have no effect on output. The CACTI config files are only used for power estimation. If you want to see the effect on IPC, you need to change them in gem5.cfg Question: I never touch gem5.cfg, can you attach a gem5.cfg example or explanation with all the effects on? I look at the gem5.cfg, it contains 50 lines, I do not have a description and explanation of parameters of how to use them. 3. For CUP type: only DerivO3CPU and TimingSimpleCPU worked. Others, caused the core dumped in test_store_load.c I type below, forgive me if I have some typo: 3.1. CPU type OK List: Drive03CPU. TimingSimpleCPU 3.2. CPU type NG List (core dumped): AtomicSimpleCPU, NonCaching..., X86KvmCPU, TraceCPU 4. For the memory type below, the OK list are worked. Others causes core dumped in test_load_store.c 4.1 memory type OK List: DDR3_1600_8x8, DDR3_2133_8x8, LPDDR3_1600_1x32, LPDDR4_3200_2x16, HBM_1000_4H_1x128, HBM_1000_4H_1x64, WideIO_200_1x32, DDR4_2400_8x8, DDR4_2400_4x16, DDR4_2400_16x6, SimpleMemory, LPDDR2_S4_1066_1x32 4.2. NG (No Good) List: DRAMCtrl, GDDR5_4000_2x32, HMC_2500_1x32, QoSMemSinkCtrl 5. I am implementing the parallel run of DSE (Design Space Exploration) of DSE dataset for Deep Learning Modeling and Hypermapper Multi-Objective Optimization, i.e., Max Performance (instruction/cycle), Minimize Power, Minimize Area). Gem5-Aladdin is a wonderful tool. Thanks for your efforts. Sincerely Yours, Peter H. Chen

…

On Thu, Feb 10, 2022 at 10:47 PM Sam Xi ***@***.***> wrote: I test l3_size and L3_assoc. There is no effect for L3_size and L3_assoc? gem5-aladdin's default system only contains L1 and L2 caches. You can modify this yourself to add a third level cache if you want. cacti tlb size, lq size, sq size, l3_size, and l3_assoc have no effect on output. The CACTI config files are only used for power estimation. If you want to see the effect on IPC, you need to change them in gem5.cfg. For CUP type: only DerivO3CPU and TimingSimpleCPU worked. Others, caused the core dumped in test_store_load.c [image: image.png] Again, I cannot see the image you attached, please paste the text of the core dump. I know we use one CPU type for fast forwarding and another for detailed simulation. For the memory type below, the OK list are worked. Others causes core dumped in test_load_store.c [image: image.png] Again, cannot see the image. Please paste the text of the error, not a screenshot. — Reply to this email directly, view it on GitHub <#42 (comment)>, or unsubscribe <https://github.com/notifications/unsubscribe-auth/ADBSBDYGJ3U4SHBEXU57BM3U2SWIRANCNFSM5HTW7UTQ> . Triage notifications on the go with GitHub Mobile for iOS <https://apps.apple.com/app/apple-store/id1477376905?ct=notification-email&mt=8&pt=524675> or Android <https://play.google.com/store/apps/details?id=com.github.android&referrer=utm_campaign%3Dnotification-email%26utm_medium%3Demail%26utm_source%3Dgithub>. You are receiving this because you authored the thread.Message ID: ***@***.***>

-- Sincerely Yours, Peter H. Chen

[peterhchen]

Hi Professor Xi: I summary as below. A. How to setup the L3 Size and L3 Assoc? B. Our project member Dr. Sang Wood Do ask, is it possible to setup L4 Size and L4 Assoc in future? DSE (Design Space Exploration) Platform: 1. Cacti Parameters: gem5.cfg: related to Power, area, performance 1.1 Cache Size: 1.1.1 cache_size = 32kB 1.1.2 cache_assoc = 4/... 1.1.3 cache_queue_size = 32/64 1.1.4 cache_bandwidth = 4 1.1.5 cache_hit_latency = 1 1.2 cacheline size: 1.2.1 cache_line_sz = 64/32 1.3 tlb (Translation Lookahead Buffer): 1.3.1 tlb_page_size = 2048/4096 1.3.2 tlb_entries = 1/64 1.3.3 tlb_assoc = 0/8 1.3.4 tlb_bandwidth = 4/... 1.3.5 tlb_miss_latency = 100/... 1.3.6 tlb_hit_latency = 1/... 1.3.7 tlb_max_outstanding_walks = 4/... 1.4 sq (store queue): 1.4.1 store_queue_size = 32 1.4.2 store_bandwidth = 3 1.5 lq (load_queue): 1.5.1 load_bandwidth = 3 1.5.2 load_queue_size = 32 2. Gem5 Parameters: 2.1 CPU-Type: 2.1.1 CPU type OK List: Drive03CPU, TimingSimpleCPU 2.1.2 CPU type NG List (core dumped): AtomicSimpleCPU, NonCachingSimpleCPU, X86KvmCPU, TraceCPU 2.2 Mem-type: 2.2.1 Memory type OK List: DDR3_1600_8x8, DDR3_2133_8x8, LPDDR3_1600_1x32, LPDDR4_3200_2x16, HBM_1000_4H_1x128, HBM_1000_4H_1x64, WideIO_200_1x32, DDR4_2400_8x8, DDR4_2400_4x16, DDR4_2400_16x6, SimpleMemory, LPDDR2_S4_1066_1x32 2.2.2 NG (No Good) List: DRAMCtrl, GDDR5_4000_2x32, HMC_2500_1x32, QoSMemSinkCtrl 3. Gem5-aladdin: L1i-size, L1i_assoc, L1D-size, l1d_assoc, L2 size, l2 Assoc, 3.1 L1I_size: OK 3.2 L1I_Assoc: OK 3.3 L1D_size: OK 3.4 L1D_Assoc: OK 3.5 L2_size: OK 3.6 L2_Assoc: OK 3.7 L3_size: No effect 3.8 L3_Assoc: No effect

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On Fri, Feb 11, 2022 at 9:52 AM Peter Chen ***@***.***> wrote: 1. gem5-aladdin's default system only contains L1 and L2 caches. You can modify this yourself to add a third level cache if you want. cacti tlb size, lq size, sq size, l3_size, and l3_assoc have no effect on output. Question: 1.1 I only use docker samxyz image. I compile the application based on the Professor Xi script given to me. 1.2 I do not know how to modify the gem5-aladdin code, do I need to modify and recompile gem5-aladdin code? 2. cacti tlb size, lq size, sq size, l3_size, and l3_assoc have no effect on output. The CACTI config files are only used for power estimation. If you want to see the effect on IPC, you need to change them in gem5.cfg Question: I never touch gem5.cfg, can you attach a gem5.cfg example or explanation with all the effects on? I look at the gem5.cfg, it contains 50 lines, I do not have a description and explanation of parameters of how to use them. 3. For CUP type: only DerivO3CPU and TimingSimpleCPU worked. Others, caused the core dumped in test_store_load.c I type below, forgive me if I have some typo: 3.1. CPU type OK List: Drive03CPU. TimingSimpleCPU 3.2. CPU type NG List (core dumped): AtomicSimpleCPU, NonCaching..., X86KvmCPU, TraceCPU 4. For the memory type below, the OK list are worked. Others causes core dumped in test_load_store.c 4.1 memory type OK List: DDR3_1600_8x8, DDR3_2133_8x8, LPDDR3_1600_1x32, LPDDR4_3200_2x16, HBM_1000_4H_1x128, HBM_1000_4H_1x64, WideIO_200_1x32, DDR4_2400_8x8, DDR4_2400_4x16, DDR4_2400_16x6, SimpleMemory, LPDDR2_S4_1066_1x32 4.2. NG (No Good) List: DRAMCtrl, GDDR5_4000_2x32, HMC_2500_1x32, QoSMemSinkCtrl 5. I am implementing the parallel run of DSE (Design Space Exploration) of DSE dataset for Deep Learning Modeling and Hypermapper Multi-Objective Optimization, i.e., Max Performance (instruction/cycle), Minimize Power, Minimize Area). Gem5-Aladdin is a wonderful tool. Thanks for your efforts. Sincerely Yours, Peter H. Chen On Thu, Feb 10, 2022 at 10:47 PM Sam Xi ***@***.***> wrote: > I test l3_size and L3_assoc. There is no effect for L3_size and L3_assoc? > > gem5-aladdin's default system only contains L1 and L2 caches. You can > modify this yourself to add a third level cache if you want. > > cacti tlb size, lq size, sq size, l3_size, and l3_assoc have no effect on > output. > > The CACTI config files are only used for power estimation. If you want to > see the effect on IPC, you need to change them in gem5.cfg. > > For CUP type: only DerivO3CPU and TimingSimpleCPU worked. Others, caused > the core dumped in test_store_load.c [image: image.png] > > Again, I cannot see the image you attached, please paste the text of the > core dump. I know we use one CPU type for fast forwarding and another for > detailed simulation. > > For the memory type below, the OK list are worked. Others causes core > dumped in test_load_store.c [image: image.png] > > Again, cannot see the image. Please paste the text of the error, not a > screenshot. > > — > Reply to this email directly, view it on GitHub > <#42 (comment)>, > or unsubscribe > <https://github.com/notifications/unsubscribe-auth/ADBSBDYGJ3U4SHBEXU57BM3U2SWIRANCNFSM5HTW7UTQ> > . > Triage notifications on the go with GitHub Mobile for iOS > <https://apps.apple.com/app/apple-store/id1477376905?ct=notification-email&mt=8&pt=524675> > or Android > <https://play.google.com/store/apps/details?id=com.github.android&referrer=utm_campaign%3Dnotification-email%26utm_medium%3Demail%26utm_source%3Dgithub>. > > You are receiving this because you authored the thread.Message ID: > ***@***.***> > -- Sincerely Yours, Peter H. Chen

-- Sincerely Yours, Peter H. Chen

[peterhchen]

Dear Professor Xi: What is the relation between *cache_size* in *gem5.cfg* and * l1i_size, l1d_size, l2_size, and l3_size* in *run.sh*. Cordially Yours, Peter H. Chen

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On Fri, Feb 11, 2022 at 9:52 AM Peter Chen ***@***.***> wrote: 1. gem5-aladdin's default system only contains L1 and L2 caches. You can modify this yourself to add a third level cache if you want. cacti tlb size, lq size, sq size, l3_size, and l3_assoc have no effect on output. Question: 1.1 I only use docker samxyz image. I compile the application based on the Professor Xi script given to me. 1.2 I do not know how to modify the gem5-aladdin code, do I need to modify and recompile gem5-aladdin code? 2. cacti tlb size, lq size, sq size, l3_size, and l3_assoc have no effect on output. The CACTI config files are only used for power estimation. If you want to see the effect on IPC, you need to change them in gem5.cfg Question: I never touch gem5.cfg, can you attach a gem5.cfg example or explanation with all the effects on? I look at the gem5.cfg, it contains 50 lines, I do not have a description and explanation of parameters of how to use them. 3. For CUP type: only DerivO3CPU and TimingSimpleCPU worked. Others, caused the core dumped in test_store_load.c I type below, forgive me if I have some typo: 3.1. CPU type OK List: Drive03CPU. TimingSimpleCPU 3.2. CPU type NG List (core dumped): AtomicSimpleCPU, NonCaching..., X86KvmCPU, TraceCPU 4. For the memory type below, the OK list are worked. Others causes core dumped in test_load_store.c 4.1 memory type OK List: DDR3_1600_8x8, DDR3_2133_8x8, LPDDR3_1600_1x32, LPDDR4_3200_2x16, HBM_1000_4H_1x128, HBM_1000_4H_1x64, WideIO_200_1x32, DDR4_2400_8x8, DDR4_2400_4x16, DDR4_2400_16x6, SimpleMemory, LPDDR2_S4_1066_1x32 4.2. NG (No Good) List: DRAMCtrl, GDDR5_4000_2x32, HMC_2500_1x32, QoSMemSinkCtrl 5. I am implementing the parallel run of DSE (Design Space Exploration) of DSE dataset for Deep Learning Modeling and Hypermapper Multi-Objective Optimization, i.e., Max Performance (instruction/cycle), Minimize Power, Minimize Area). Gem5-Aladdin is a wonderful tool. Thanks for your efforts. Sincerely Yours, Peter H. Chen On Thu, Feb 10, 2022 at 10:47 PM Sam Xi ***@***.***> wrote: > I test l3_size and L3_assoc. There is no effect for L3_size and L3_assoc? > > gem5-aladdin's default system only contains L1 and L2 caches. You can > modify this yourself to add a third level cache if you want. > > cacti tlb size, lq size, sq size, l3_size, and l3_assoc have no effect on > output. > > The CACTI config files are only used for power estimation. If you want to > see the effect on IPC, you need to change them in gem5.cfg. > > For CUP type: only DerivO3CPU and TimingSimpleCPU worked. Others, caused > the core dumped in test_store_load.c [image: image.png] > > Again, I cannot see the image you attached, please paste the text of the > core dump. I know we use one CPU type for fast forwarding and another for > detailed simulation. > > For the memory type below, the OK list are worked. Others causes core > dumped in test_load_store.c [image: image.png] > > Again, cannot see the image. Please paste the text of the error, not a > screenshot. > > — > Reply to this email directly, view it on GitHub > <#42 (comment)>, > or unsubscribe > <https://github.com/notifications/unsubscribe-auth/ADBSBDYGJ3U4SHBEXU57BM3U2SWIRANCNFSM5HTW7UTQ> > . > Triage notifications on the go with GitHub Mobile for iOS > <https://apps.apple.com/app/apple-store/id1477376905?ct=notification-email&mt=8&pt=524675> > or Android > <https://play.google.com/store/apps/details?id=com.github.android&referrer=utm_campaign%3Dnotification-email%26utm_medium%3Demail%26utm_source%3Dgithub>. > > You are receiving this because you authored the thread.Message ID: > ***@***.***> > -- Sincerely Yours, Peter H. Chen

-- Sincerely Yours, Peter H. Chen