Comments (3)
user@ubuntu:~/ankur/intel-cmt-cat/rdtset$ lscpu
Architecture: x86_64
CPU op-mode(s): 32-bit, 64-bit
Byte Order: Little Endian
CPU(s): 16
On-line CPU(s) list: 0-15
Thread(s) per core: 2
Core(s) per socket: 8
Socket(s): 1
NUMA node(s): 1
Vendor ID: GenuineIntel
CPU family: 6
Model: 79
Model name: Intel(R) Xeon(R) CPU E5-2620 v4 @ 2.10GHz
Stepping: 1
CPU MHz: 1200.035
CPU max MHz: 3000.0000
CPU min MHz: 1200.0000
BogoMIPS: 4194.75
Virtualization: VT-x
L1d cache: 32K
L1i cache: 32K
L2 cache: 256K
L3 cache: 20480K
NUMA node0 CPU(s): 0-15
Flags: fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx pdpe1gb rdtscp lm constant_tsc arch_perfmon pebs bts rep_good nopl xtopology nonstop_tsc aperfmperf eagerfpu pni pclmulqdq dtes64 monitor ds_cpl vmx smx est tm2 ssse3 sdbg fma cx16 xtpr pdcm pcid dca sse4_1 sse4_2 x2apic movbe popcnt tsc_deadline_timer aes xsave avx f16c rdrand lahf_lm abm 3dnowprefetch epb intel_pt tpr_shadow vnmi flexpriority ept vpid fsgsbase tsc_adjust bmi1 hle avx2 smep bmi2 erms invpcid rtm cqm rdseed adx smap xsaveopt cqm_llc cqm_occup_llc cqm_mbm_total cqm_mbm_local dtherm ida arat pln pts
from intel-cmt-cat.
user@ubuntu:~/ankur/intel-cmt-cat/rdtset$ cat /etc/os-release
NAME="Ubuntu"
VERSION="16.04.1 LTS (Xenial Xerus)"
ID=ubuntu
ID_LIKE=debian
PRETTY_NAME="Ubuntu 16.04.1 LTS"
VERSION_ID="16.04"
HOME_URL="http://www.ubuntu.com/"
SUPPORT_URL="http://help.ubuntu.com/"
BUG_REPORT_URL="http://bugs.launchpad.net/ubuntu/"
UBUNTU_CODENAME=xenial
from intel-cmt-cat.
Hi Ankur, thanks for contacting us with your issue.
Can you make sure the library is built before building the tools.
You can do this by building everything from the top level directory with cd intel-cmt-cat && make
Or, build the library with cd intel-cmt-cat/lib && make and then build the pqos utility.
from intel-cmt-cat.
Related Issues (20)
- How to modify the number of cache ways HOT 1
- array cores[] in unit-test/lib/test_hw_monitoring.c has a suspicious access at index 1
- Pull request failed with style problems HOT 1
- RDT for VM HOT 1
- A question about the implementation of intel-cmt-cat HOT 5
- Does this tool support for Intel(R) Core(TM) i7-7800X CPU @ 3.50GHz? HOT 2
- Do Intel(R) Xeon(R) 2nd Generation Scalable Processors have support for L3 cat as specified in the README? HOT 1
- Can pqos bind LLC and MB to PID? HOT 1
- Does this tool support for 12th Gen Intel(R) Core(TM) i3-12100F?
- Supports for 13th Gen Intel Core
- Why setting COS through code APIs is invalid? HOT 2
- A question about the USE of Highest Way in l3_cat HOT 2
- Project versioning update
- conflict with libvirt cachetune
- Intel RDT for 13th Gen Intel(R) Core(TM) i9-13900KS HOT 1
- What is shareable_bits in resctrl?Or what is "ways contention bit-mask" in pqos? HOT 1
- Could I check if pqos set llc value is valid in linux file system HOT 1
- Installing problem HOT 2
- The pqos tool fails on systems with 300 or more CPU cores HOT 1
- Create version tag following the traditional v5.0.0 style HOT 1
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from intel-cmt-cat.