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liudliang's Projects

altium-libs icon altium-libs

PCB footprint and schematic libraries for Altium Designer

ar2 icon ar2

6 axis stepper motor robot and control software - Gen2

at_device icon at_device

AT component porting or samples for different devices

can-bootloader icon can-bootloader

使用USB2XXX实现的CAN Bootloader功能,实现CAN节点固件远程升级

cores icon cores

Various HDL (Verilog) IP Cores

daisho icon daisho

SuperSpeed USB 3.0 FPGA platform

eegaqui_fpga_headstage icon eegaqui_fpga_headstage

32 lead aquisition with ice40 fpga's and headstage w/ peripherals (3 axis accellerometer, gyro), targeting for low power consumption (between 1-2V, minus usb), ideally running off of rechargable batteries

fpga-audio-recorder-player icon fpga-audio-recorder-player

A project made in Verilog for Xilinx Spartan6 FPGA board. The user interfaces the board through a PC connected via USB and using terminal such as puTTY. The project includes a Picoblze program that will output a menu of options to the users terminal where the user can then select from a list of options. These options include record, play, pause, and delete (audio increase and decrease available on physical buttons on FPGA). This project utilizes the audio codec on the Spartan6 (SM2603), the onboard DDR2 RAM, picoblaze CPU that processes user input to a state, and a finite state machine for the state produced by Picoblaze. For more details, read the readme included.

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