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auto-iverilog-script

python script for running a verilog 'top.v'+it's dependencies with a 'tb.b' to GTKwave in one go

automatic-verilog

automatic-verilog-vimscript

axi-ddr3

学习AXI接口，以及xilinx DDR3 IP使用

basic_verilog

Must-have verilog systemverilog modules

bmp2yuv

a.bmp to a.yuv

comet

RISC-V ISA based 32-bit processor written in HLS

copytranslator

Foreign language reading and translation assistant based on copy and translate.

cv

✔（已完结）最全面的 深度学习 笔记【土堆 Pytorch】【李沐 动手学深度学习】【吴恩达 深度学习】

dc_shell_tcl_script

Automate Design Synthesis

deep-translator

A flexible free and unlimited python tool to translate between different languages in a simple way using multiple translators.

easyuvm

A simple UVM example with DPI

easyuvm-master

edalize

An abstraction library for interfacing EDA tools

embedpythoninverilogexample

embedPythonInVerilogExample

fpga

帮助大家进行FPGA的入门，分享FPGA相关的优秀文章，优秀项目

fpga_threelevelstorage

【原创，已被编入官方教材】Three-level storage subsystem(SD+DDR2 SDRAM+Cache), based on Nexys4 FPGA board. 同济大学计算机系统结构课程设计，FPGA三级存储子系统。

galileo-makefile

Makefile of C Program for Intel Galileo

gnome-terminal

:scream: A dark theme for Gnome Terminal

gnome-terminal-colors-solarized

Solarized Gnome Terminal colors, based on http://ethanschoonover.com/solarized

gogh

Color Scheme for Gnome Terminal and Pantheon Terminal

guqian110.github.io

Personal Blog

gvim_for_verilog

this repository is vim cfg for verilog.

hexdumpmem

hexdumpmem is hexdump-like tool to dump memory and write memory. When developing a system on a SoC, I usually need to dump or write memory-map registers of the SoC for debugging. I write this program to do it on my developing Android phone.

hls_tutorials

Tutorials on HLS Design

hw

RTL, Cmodel, and testbench for NVDLA

ic-compiler-block-level-implementation

IC Compiler Block-Level Implementation

imagetools

这是一款图像相关的工具软件，扩展性好。目前集成有镜头计算器、抖动测试工具、看图工具、RAW图编辑（ISP算法的实现）、PQtools直接生成代码、多视频对比等功能。可以方便的进行后期算法的验证

imx185-datesheet-translation

IMX185-datesheet-translation

infinite-isp_referencemodel

A Python based fixed-point implementation of the Infinite-ISP design for ASIC and FPGA design and verification.

isp

ISP algos