Research and Development Engineer's Projects
Simulation code for EdgeGO -- A resource sharing framework for 6G edge computing in massive IoT systems, https://ieeexplore.ieee.org/document/9375469/
A set of mixed-integer linear programs designed to reduce the CO2 emissions of a simulated 6G cloud-fog network architecture. Designed in AMPL.
Repository for Udemy course : Embedded System Programming on ARM Cortex Mx
DL tackling Massive-MIMO problems
Implementation of deep reinforcement learning for optimizing the beams and predicting the blockage events
Repository for udemy Embedded-C course
Discrete Simulator for Scheduling in Full Duplex OFDMA Wireless Networks
A toolkit for developing and comparing reinforcement learning algorithms.
Python implementations of the k-modes and k-prototypes clustering algorithms, for clustering categorical data
My solution for a MARL problem on a Grid Environment with Q-tables.
A proof-of-concept implementation of Route Selection on Clustered Cognitive Radio Networks (CRNs) on USRP N200/ GNU Radio. In CRNs, secondary user (SU) explore and exploit spectrum in the absence of primary users (PUs). The SU nodes in the topology are static and divided into three main classes source node, intermediate nodes and destination node.
Part 1 project for ME5406 in NUS
Multi-Generator (MGEN) traffic generation tool
Config files for my GitHub profile.
Simulation code for “Optimal Multiuser Transmit Beamforming: A Difficult Problem with a Simple Solution Structure” by Emil Björnson, Mats Bengtsson, and Björn Ottersten, IEEE Signal Processing Magazine, vol. 31, no. 4, pp. 142-148, July 2014.
An interference-aware scheduler for fine-grained GPU sharing
Deep Reinforcement Learning Based Dynamic Resource Allocation in 5G Ultra-Dense Networks
Code containing RRM simulation using RL in a scenario with RAN slicing.
Source code for the software implementation of SeGraM proposed in our ISCA 2022 paper: Senol Cali et. al., "SeGraM: A Universal Hardware Accelerator for Genomic Sequence-to-Graph and Sequence-to-Sequence Mapping" at https://people.inf.ethz.ch/omutlu/pub/SeGraM_genomic-sequence-mapping-universal-accelerator_isca22.pdf
Sionna: An Open-Source Library for Next-Generation Physical Layer Research
This folder contains all my STM32 programming projects shared on YouTube
STM32 tutorial with STM32Cube and Keil MDK-ARM
Timeloop performs modeling, mapping and code-generation for Tensor Algebra workloads running on Explicitly-Decoupled Data Orchestration (EDDO) architectures.
Code for M. Polese, J. Jornet, T. Melodia, M. Zorzi, “Toward End-to-End, Full-Stack 6G Terahertz Networks”, https://arxiv.org/abs/2005.07989, 2020.
Wireless Cellular Simulator for Radio Resource Management
React
Typescript
Django
Laravel
Facebook
Microsoft
Google
Alibaba
D3
Tencent