nguyencanhtrung Goto Github PK

5g-nr-ldpc

A 3GPP 5G NR compliant LDPC library.

autosa

AutoSA: Polyhedral-Based Systolic Array Compiler

axi-pcie-core

Slaclab PCIe implementation

bluespec-compiler

Bluespec Compiler (BSC)

chipyard

An Agile RISC-V SoC Design Framework with in-order cores, out-of-order cores, accelerators, and more

cocotb

Studying cocotb

cpu-2016

dsp_coursera

dynamic-function-exchange

Guide to get familiar with DFX flow

embedded_system_lab

emecsthon2016-tukl

A project for auto balance platform, implemented in EMECS-thon 2016 (6/2 -8/2)

fec

FEC Codec IP core library for a some famous codes (BCH, RS, LDPC, Turbo)

firesim

FireSim: Fast and Effortless FPGA-accelerated Hardware Simulation with On-Prem and Cloud Flexibility

fp_multiplier_pipeline

fpga-orchard

TBD

high-performance-computing

hlx_examples

Open Source HLx Examples

ks_asic_workshop

kvm-pcie

Installing KVM and passthrough PCIe (Xilinx FPGA AU200)

latex

litex

Build your hardware, easily!

machine-learning

Public repository - storing problems and solutions of online course: Machine Learning

matlab

matlab-5gnr

Matlab implementations of several 5G L1 functions

microzed-axi-dma

Demonstration of the AXI DMA engine on the MicroZed

mips

A classic 5-stage pipeline MIPS 32-bit processor, including a 2-bit branch predictor, a branch prediction buffer and a direct-mapped cache.

mips-pipelined

Implementation of a 16-bit pipeline CPU

mulcycleproc

nguyencanhtrung.github.io

noc-constellation

A Chisel RTL generator for network-on-chip interconnects