Comments (2)
Instead of using atomics, we should use volatiles and flush the TLB entry for the magic address (see http://blog.stuffedcow.net/2015/08/pagewalk-coherence/). This would also avoid compiler reordering (since flushing the TLB uses inline assembly).
from blog_os.
Closing, as we're using the tlb::flush
operation after each page table modification now. This tells both the CPU (through the TLB flush) and the compiler (through the memory
modifier in inline assembly) that no such reordering is allowed.
from blog_os.
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