Comments (4)
Didn't mean to close this one.
from probe-rs.
@Yatekii, as we discussed.
I will first work on Adding TI's CC13xx/CC26xx, but maybe can get to it after. We will see :) Making the issue so we don't lose it.
from probe-rs.
Sounds great, thanks!
from probe-rs.
To toss in a couple interesting cases, the STM32F401xB/C and STM32F401xD/E MCUs have two TAPs, though (IIRC) the CMSIS packs don't declare them. From the manual:
23.5 STM32F401xB/C and STM32F401xD/E JTAG TAP connection
The STM32F401xB/C and STM32F401xD/E MCUs integrate two serially connected JTAG TAPs, the boundary scan TAP (IR is 5-bit wide) and the Cortex ®-M4 with FPU TAP (IR is 4-bit wide).
To access the TAP of the Cortex ®-M4 with FPU for debug purposes:
- First, it is necessary to shift the BYPASS instruction of the boundary scan TAP.
- Then, for each IR shift, the scan chain contains 9 bits (=5+4) and the unused TAP instruction must be shifted in using the BYPASS instruction.
- For each data shift, the unused TAP, which is in BYPASS mode, adds 1 extra data bit in the data scan chain.
Note: Important: Once Serial-Wire is selected using the dedicated Arm® JTAG sequence, the
boundary scan TAP is automatically disabled (JTMS forced high).
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Related Issues (20)
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from probe-rs.