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accdnn

A compiler from AI model to RTL (Verilog) accelerator in FPGA hardware with auto design space exploration.

altera-de2-ann

Artificial Neural Network on Altera DE2

cnn-fpga

cnn_open

A hardware implementation of CNN, written by Verilog and synthesized on FPGA

cnn_vgg19_verilog

Convolution Neural Network of vgg19 model in verilog

combinational-bnn

System Verilog code describing a fully combinational binarized neural network.

constantnit

PythonTutorial

convolutional-neural-network

Implementation of CNN using Verilog

convolutional-neural-network-hardware-using-verilog

A project on hardware design for convolutional neural network. This neural network is of 2 layers with 400 inputs in the first layer. This layer takes input from a memory. A MATLAB script was created to get the floating point inputs and convert it to 7 bit signed binary output. This was done for inputs as well as the weights in these two layers. Sigmoid case statement was also implemented in verilog to get the sigmoid values for intermediate outputs in a layer. This design was simulated and synthesized at 50 MHz on Quartus Prime 17.0. The FPGA family was Cyclone V. Total logic elements used were 724, total bits used 121856(only 50% use of memory).

cores

course_material

cs231n-project

CNN accelerator

deep-neural-network-hardware-accelerator

SystemVerilog HDL and TB code Deep Neural Network Hardware Accelerator implementation on zybo 7010 FPGA and also C code for Vivado SDK Software

dnnbp

Deep Neural Network with back propagation implemented in Verilog.

dnnweaver2

Open Source Specialized Computing Stack for Accelerating Deep Neural Networks.

fpga-cnn

FPGA implementation of Cellular Neural Network (CNN)

fpga-nn

NN on FPGA

fpga_based_cnn

FPGA based acceleration of Convolutional Neural Networks. The project is developed by Verilog for Altera DE5 Net platform.

hardware-cnn

A convolutional neural network implemented in hardware (verilog)

hdlparse

Simple parser for extracting VHDL documentation

hls4ml

Machine learning in FPGAs using HLS

hls4ml-tutorial

Tutorial notebooks for hls4ml

hls_simulation

hw

RTL, Cmodel, and testbench for NVDLA

implementation-of-artificial-neural-networks-ann-in-verilog

Implementation of Electronic model of Human brain in Verilog

machine-learning

mobilenet-in-fpga

Generator of verilog description for FPGA MobileNet implementation

myhdl

The MyHDL development repository

neural-hardware

Verilog library for implementing neural networks.

neuralhardware