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abseil-cpp

Abseil Common Libraries (C++)

aes

Verilog implementation of the symmetric block cipher AES (Advanced Encryption Standard) as specified in NIST FIPS 197. This implementation supports 128 and 256 bit keys.

agx-kernel

NVidia AGX kernel

agx-nvidia

AGX nvidia hardware drivers

android-yolo

Real-time object detection on Android using the YOLO network with TensorFlow

apb_uart_sv

ariane

Ariane is a 6-stage RISC-V CPU capable of booting Linux

ariane-ethernet

open-source Ethenet media access controller for Ariane on Genesys-2

ariane-sdhc

axi

AXI4 and AXI4-Lite synthesizable modules and verification infrastructure

axi2apb

pulp based axi2apb adapter

axi_id_remap

AXI ID remapper core with configurable input and output ID widths and a configurable number of ID slots

axi_sram

AXI sram adapter

bender

A dependency management tool for hardware projects.

bigpulp

RISC-V manycore accelerator for HERO, bigPULP hardware platform

binutils-gdb

Unofficial mirror of sourceware binutils-gdb repository. Updated daily.

bkp9103_9104

Control and query for a BK 9103 and 9104 power supply.

blender

Official mirror of Blender

boringssl

Mirror of BoringSSL

buildkit

concurrent, cache-efficient, and Dockerfile-agnostic builder toolkit

c-ares

A C library for asynchronous DNS requests

carla

Open-source simulator for autonomous driving research.

clint

RISC-V Core Local Interrupt Controller (CLINT)

cluster_interconnect

coding-standard

A collection of coding standard related what-have-yous

commit-hooks

Bunch of recogni specific commit hooks

common_cells

Common SV components

corundum

Open source, high performance, FPGA-based NIC

cyclegan-tensorflow

Tensorflow implementation for learning an image-to-image translation without input-output pairs. https://arxiv.org/pdf/1703.10593.pdf

dbt-rise-riscv

An instruction set simulator based on DBT-RISE implementing the RISC-V ISA