Comments (5)
vint32m1_t vredmax_vs_i32m2_i32m1 (vin32m1_t dest, vint32m2_t vector, vint32m1_t scalar);
This kind of interface, compiler need merge dest
and scalar
first, which might emit 1~2 extra instructions, those instructions might able to optimize out later, but it little violate current 1-1 mapping design principle.
And user can use vmv_s_x
+ vredmax_vs
to get same semantics if they want, so I would prefer keep current interfcae.
from rvv-intrinsic-doc.
Hi @kito-cheng, thanks for the comments.
I didn't expect scalar be merged into dest. Given that particular instruction
vredmax.vs vd, vs2, vs1, vm # vd[0] = max( vs1[0] , vs2[*] )
The idea was to allow a way to control the rest of elements of vd
that are not updated (vd[1:VLMAX-1]
). We can achieve this if dest
is stored in vd
already, without extra instructions, right? (vector
would be in vs2
and scalar
in vs1
)
Perhaps I'm missing something obvious here.
from rvv-intrinsic-doc.
@rofirrim I checked the v isa spec again, it's my mistake, and sounds like your proposal made the interface more consistent.
from rvv-intrinsic-doc.
+1, I think it's a good idea for consistent interface.
from rvv-intrinsic-doc.
I also agree with @rofirrim's proposal. If there is no objection, I will update the document for reduction operations.
from rvv-intrinsic-doc.
Related Issues (20)
- [Requirement]: The RISC-V RVV vector intrinsic must include support for vector groups in the __riscv_vfredosum function HOT 4
- Type-relative overloads for vreinterpret, vlmul_ext, vlmul_trunc, etc. HOT 1
- How to use a class to wrap or derive from a sizeless vector type HOT 1
- Encode all the effects of vsetvl in the return type, for use in subsequent type deductions HOT 1
- Does `__riscv_v_intrinsic >= 1000000` imply overloaded intrinsics are supported?
- Create bibliography from reference section HOT 3
- Simple questions about inline assembly in vmv.x.s instruction HOT 2
- Asterisks are not subscripts
- the wrong result of "vmerge_vvm_i32m1" HOT 5
- ta,ma reduction destination with vl=0 HOT 1
- Clarify the consequences of vxsat not being handled by the intrinsics HOT 3
- Add a section with examples HOT 3
- Rename uses of {implicit,explicit}-frm into {Implicit, Explicit} FP rounding mode HOT 1
- Clarify the mapping of pseudo-intrinsics
- Clarify what float and double means HOT 1
- Fix authors in the document
- How to use LMUL in rvv-intrinsic? HOT 6
- Mismatched bfloat16 autogenerated files HOT 3
- Freeze the specification HOT 1
- `vfirst` and `vcpop` return types unexpectedly changed HOT 1
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from rvv-intrinsic-doc.