Comments (9)
Hi @zakk0610 ,
Thanks for your proposal! But it doesn't seem like what I want in #28. I want to combine two (or more) small LMUL
vectors to one big LMUL
vector, or conversely, to split one big LMUL
vector to two (or more) small LMUL
vectors. Because my development is based on a fixed 128-bits VLEN
, the vl
should be changed with LMUL
.
What I want may looks like
//vector combine
vint64m2_t vcombine_i64m1_i64m2 (vint64m1_t op1, vint64m1_t op2);
//vector split
vint64m1_t vget_low_i64m2_i64m1 (vint64m2_t op1); //get the low half of big vector
vint64m1_t vget_high_i64m2_i64m1 (vint64m2_t op1); //get the high half of big vector
In my opinion, two split functions can be implemented based on slide
operation and vl
modification, but I'm not sure how to implement combine operation. Moreover, even if these operations can be implemented by other intrinsics, will the interface packaged as such be more friendly to the front-end users?
from rvv-intrinsic-doc.
I guess it should ext
before slideup
, otherwise the result might truncated?
from rvv-intrinsic-doc.
What do you think @joy2myself @HanKuanChen?
from rvv-intrinsic-doc.
LGTM
from rvv-intrinsic-doc.
@joy2myself
How about
vint64m2_t vcombine_i64m1_i64m2 (vint64m1_t op1, vint64m1_t op2, size_t vl)
{
return vlmul_ext_v_i64m1_i64m2(vslideup(op1, op2, vl));
}
from rvv-intrinsic-doc.
Like this?
vint64m2_t vcombine_i64m1_i64m2 (vint64m1_t op1, vint64m1_t op2, size_t vl)
{
return vslideup_vx_i64m2(vlmul_ext_v_i64m1_i64m2(op1), vlmul_ext_v_i64m1_i64m2(op2), vl);
}
I'm not sure does it work since ext
operation modified VLEN
, right?
from rvv-intrinsic-doc.
Those two utility functions would not modified vl so you need to reset vl if need.
like this would be better.
vint64m2_t vcombine_i64m1_i64m2 (vint64m1_t op1, vint64m1_t op2, size_t vl)
{
vint64m2_t new_op1 = vlmul_ext_v_i64m1_i64m2(op1);
vint64m2_t new_op2 = vlmul_ext_v_i64m1_i64m2(op2);
size_t new_vl = vsetvl_e64m2 (vl)
return vslideup_vx_i64m2(new_op1, new_op2, new_vl);
}
from rvv-intrinsic-doc.
Thanks! If it works, it looks good to me.
from rvv-intrinsic-doc.
I create a PR #57
If there is no other questions, I will merge it.
from rvv-intrinsic-doc.
Related Issues (20)
- [Requirement]: The RISC-V RVV vector intrinsic must include support for vector groups in the __riscv_vfredosum function HOT 4
- Type-relative overloads for vreinterpret, vlmul_ext, vlmul_trunc, etc. HOT 1
- How to use a class to wrap or derive from a sizeless vector type HOT 1
- Encode all the effects of vsetvl in the return type, for use in subsequent type deductions HOT 1
- Does `__riscv_v_intrinsic >= 1000000` imply overloaded intrinsics are supported?
- Create bibliography from reference section HOT 3
- Simple questions about inline assembly in vmv.x.s instruction HOT 2
- Asterisks are not subscripts
- the wrong result of "vmerge_vvm_i32m1" HOT 5
- ta,ma reduction destination with vl=0 HOT 1
- Clarify the consequences of vxsat not being handled by the intrinsics HOT 3
- Add a section with examples HOT 3
- Rename uses of {implicit,explicit}-frm into {Implicit, Explicit} FP rounding mode HOT 1
- Clarify the mapping of pseudo-intrinsics
- Clarify what float and double means HOT 1
- Fix authors in the document
- How to use LMUL in rvv-intrinsic? HOT 6
- Mismatched bfloat16 autogenerated files HOT 3
- Freeze the specification HOT 1
- `vfirst` and `vcpop` return types unexpectedly changed HOT 1
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from rvv-intrinsic-doc.