Comments (9)
I was formerly a strong proponent of the implicit-VL API, and a mild opponent of the explicit-VL API. I am now convinced that explicit-VL can provide better code generation, due to capabilities/limitations of current compilers. This is a practical argument, not a mathematical one, but that distinction is irrelevant to the performance programmer.
I am on board.
from rvv-intrinsic-doc.
Works for me (given previous discussion in e.g. #8 no surprise there ;-) ).
from rvv-intrinsic-doc.
Just to be sure: a function that wants to "set VL" and then restore the previous value would just vsetvl, pass the result to *_vl() ops, and the compiler takes care of restoring/setting other VL after returning?
In theory, you don't need to care about the VL
register anymore if we only using explicit VL API, so yes, the compiler will handle that VL
register restoring/setting, it's all compiler's responsibility now.
Also, is vse32_v_i32m4_vl(a, tmp); missing the last argument?
Updated, Thanks!
from rvv-intrinsic-doc.
Note: Corresponding PR will sent in next few days.
from rvv-intrinsic-doc.
@kito-cheng
Sounds good to me. This seems to match the direction taken by llvm-vp (adding VL and mask to IR ops). We have also seen some bugs caused by (manually) reordering intrinsics, which would not have happened if they were pure functions.
Just to be sure: a function that wants to "set VL" and then restore the previous value would just vsetvl, pass the result to *_vl() ops, and the compiler takes care of restoring/setting other VL after returning?
Also, is vse32_v_i32m4_vl(a, tmp);
missing the last argument?
from rvv-intrinsic-doc.
Works for me (given previous discussion in e.g. #8 no surprise there ;-) ).
@rdolbeau Thanks your take a stand for this RFC!
from rvv-intrinsic-doc.
@kito-cheng, thanks for your sharing.
Same with @knightsifive, I was formerly a strong proponent of the implicit-VL API. However, this proposal convinces us. If possible, let this proposal being landing down asap.
from rvv-intrinsic-doc.
Here is the PR #64 for this RFC :)
from rvv-intrinsic-doc.
Corresponding changes are merged.
from rvv-intrinsic-doc.
Related Issues (20)
- [Requirement]: The RISC-V RVV vector intrinsic must include support for vector groups in the __riscv_vfredosum function HOT 4
- Type-relative overloads for vreinterpret, vlmul_ext, vlmul_trunc, etc. HOT 1
- How to use a class to wrap or derive from a sizeless vector type HOT 1
- Encode all the effects of vsetvl in the return type, for use in subsequent type deductions HOT 1
- Does `__riscv_v_intrinsic >= 1000000` imply overloaded intrinsics are supported?
- Create bibliography from reference section HOT 3
- Simple questions about inline assembly in vmv.x.s instruction HOT 2
- Asterisks are not subscripts
- the wrong result of "vmerge_vvm_i32m1" HOT 5
- ta,ma reduction destination with vl=0 HOT 1
- Clarify the consequences of vxsat not being handled by the intrinsics HOT 3
- Add a section with examples HOT 3
- Rename uses of {implicit,explicit}-frm into {Implicit, Explicit} FP rounding mode HOT 1
- Clarify the mapping of pseudo-intrinsics
- Clarify what float and double means HOT 1
- Fix authors in the document
- How to use LMUL in rvv-intrinsic? HOT 6
- Mismatched bfloat16 autogenerated files HOT 3
- Freeze the specification HOT 1
- `vfirst` and `vcpop` return types unexpectedly changed HOT 1
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from rvv-intrinsic-doc.