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palmer-dabbelt avatar palmer-dabbelt commented on July 26, 2024

Does this fail on Spike?

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zhemao avatar zhemao commented on July 26, 2024

Spike just exits right away without doing anything. Is there a way to disable the FPU in Spike?

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palmer-dabbelt avatar palmer-dabbelt commented on July 26, 2024

While I've never used this, the help text

palmer palmer-mbp2014 ~ $ spike
usage: spike [host options] <target program> [target options]
Host Options:
  -p <n>             Simulate <n> processors [default 1]
  -m <n>             Provide <n> MiB of target memory [default 4096]
  -d                 Interactive debug mode
  -g                 Track histogram of PCs
  -h                 Print this help message
  --isa=<name>       RISC-V ISA string [default RV64IMAFDC]
  --ic=<S>:<W>:<B>   Instantiate a cache model with S sets,
  --dc=<S>:<W>:<B>     W ways, and B-byte blocks (with S and
  --l2=<S>:<W>:<B>     B both powers of 2).
  --extension=<name> Specify RoCC Extension
  --extlib=<name>    Shared library to load

seems to indicate that you can pass "--isa=RV64IMAC" to get rid of hardware floating point support.

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zhemao avatar zhemao commented on July 26, 2024

OK, when I do that, spike shows the same behavior as the emulator.

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sbeamer avatar sbeamer commented on July 26, 2024

Linux doesn't boot on the FPGA currently, even without the FPU.

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zhemao avatar zhemao commented on July 26, 2024

The new_privileged_isa branch of riscv-linux does boot on the FPGA w/ FPU.

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aswaterman avatar aswaterman commented on July 26, 2024

This resulted from a stack overflow, which is now fixed.

Also, Palmer's -march support broke the -msoft-float flag. Until he fixes
it, you might need to use -march=RV64IMA instead of -msoft-float.

On Thu, Jul 23, 2015 at 2:30 PM, Howard Mao [email protected]
wrote:

The new_privileged_isa branch of riscv-linux does boot on the FPGA w/ FPU.


Reply to this email directly or view it on GitHub
#10 (comment).

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prashantrar avatar prashantrar commented on July 26, 2024

I am having a similar issue while compiling c code and running it on the rocket chip without FPU, If i use the compiler flag "-march=RV64IMA" will it solve my issue.

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