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robbietoo's Projects

caffe icon caffe

Caffe: a fast open framework for deep learning.

checkedc icon checkedc

Checked C is an extension of C that adds bounds checking to C. This repo contains the specification for the extension, test code, and samples.

chisel3 icon chisel3

Chisel 3: A Modern Hardware Design Language

cocotb icon cocotb

cocotb, a coroutine based cosimulation library for writing VHDL and Verilog testbenches in Python

core-v-verif icon core-v-verif

Functional verification project for the CORE-V family of RISC-V cores.

corundum icon corundum

Open source, high performance, FPGA-based NIC

cv32e40x icon cv32e40x

4 stage, in-order, compute RISC-V core based on the CV32E40P

fpga-fast icon fpga-fast

FPGA FAST image feature detector implementation in VHDL

fpga_image_processing icon fpga_image_processing

Image capture, image filtering and image display (VGA) : picture in picture, edge detection, gray image and smooth image

freedom icon freedom

Source files for SiFive's Freedom platforms

hw icon hw

RTL, Cmodel, and testbench for NVDLA

learning-nvdla-notes icon learning-nvdla-notes

NVDLA is an Open source DL/ML accelerator, which is very suitable for individuals or college students. This is the NOTES when I learn and try. Hope THIS PAGE may Helps you a bit. Contact Me:[email protected]

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