salcanmor Goto Github PK

bitbcn_coin

Criptomoneda para el curso de postgrado de Blockchain de BITBCN

caffe

Caffe: a fast open framework for deep learning.

ccd_cam

Cam interface to FPGA using ADV7180

chaidnn

HLS based Deep Neural Network Accelerator Library for Xilinx Ultrascale+ MPSoCs

ck-dnndk

Collective Knowledge workflows for DeePhi's DNNDK

cryptocurrency_ps_module

Cryptocurrenty paying method for Prestashop

dnndk_2.8_dummy

embeddedsw

Xilinx Embedded Software (embeddedsw) Development

fabcar-client

Fabric Car Client using React JS

hlsarena

Test area for different HLS code

human-walking-ground-truth

6 videos and ground-truths when tracking a person

hyperledger-masterclass

i2c_master

Verilog module for I2C Master, up to 16 bit sub addr, 7bit slave address, and multiple byte read/write capable

jetson-fan-ctl

Automagic fan control for the Nvidia Jetson Nano

logi-pong-chu-examples

example code for the logi-boards from pong chu HDL book

matlab_kraken_api

MATLAB implementation of the API of www.kraken.com

max31855-fpga

Project to make the MAX31855 work in an FPGA and verify its behaviour.

mnist_alveo_u280_tutorial

02-MNIST_classification_tf

phd

Materials related to my PhD

quiz-generator

sdram-tester-for-papilio-pro

Tester for MT48LC4M16A2 SDRAM in Papilio Pro

serial-communication-java

simple_sdram_controller

A very simple SDRAM controller for FPGA written in Verilog. It exposes a SRAM-like interface to the rest of the FPGA fabric

sram-tester-for-cmod-a7-35t

Tester for IS61WV5128BLL-10BLI SRAM in Cmod A7-35T

trt_pose_demo

A Demo Application for NVIDIA TensorRT Pose Estimation

ultra96-xilinx-dnn-development-kit

Project for SmartSystems class with Ultra96

verilog

Repository for basic (and not so basic) Verilog blocks with high re-use potential.

vitis_ai_custom_platform_v1.2_tmp

For v1.2 test

xilinx-edge-ai

yolact_edge

The first competitive instance segmentation approach that runs on small edge devices at real-time speeds.