scx111 Goto Github PK
Type: User
Company: Hebei University of Technology
scx111's Projects
amba_axi_ahb_apb
AMBA bus lecture material
anlinux-app
AnLinux allow you to run Linux on Android without root access.
apb4_gpio
General Purpose IO with APB4 interface
apb4_mux
APB4 Multiplexor
axi4_interconnect
AXI总线连接器
core_ddr3_controller
A DDR3 memory controller in Verilog for various FPGAs
core_dvi_framebuffer
Minimal DVI / HDMI Framebuffer
display_controller
FPGA display controller with support for VGA, DVI, and HDMI.
dma_axi
AXI DMA 32 / 64 bits
fedar-f1-rv64im
5-Stage Pipelined RV64IM RISC-V CPU design in Verilog.
flearadio
Digital FM Radio Receiver for FPGA
fm_radio
Simple mono FM Radio.
gtkwave
GTKWave is a fully featured GTK+ based wave viewer for Unix and Win32 which reads LXT, LXT2, VZT, FST, and GHW files as well as standard Verilog VCD/EVCD files and allows their viewing.
hardh264
A hardware h264 video encoder written in VHDL. Designed to be synthesized into an FPGA. Initial testing is using Xilinx tools and FPGAs but it is not specific to Xilinx.
iverilog
Icarus Verilog
iverilog-tutorial
Quickstart guide on Icarus Verilog.
latexcv
:necktie: A collection of cv and resume templates written in LaTeX. Leave an issue if your language is not supported!
mips_cpu
一个支持AXI总线、支持Cache、包括所有非浮点MIPS 1指令、支持例外的静态五级流水MIPS CPU
oruxmaps
onlinemapsources.xml for oruxmaps
oscpu
我的一生一芯项目
plic
Platform Level Interrupt Controller
risc-v-processor-design
Based on YSYX OSCPU framework
run
润学全球官方指定GITHUB，整理润学宗旨、纲领、理论和各类润之实例；解决为什么润，润去哪里，怎么润三大问题； 并成为新**人的核心宗教，核心信念。
rv12
RISC-V CPU Core
rv32i
A toy RISC-V processor
sd-card-controller
WISHBONE SD Card Controller IP Core
uvmprimer
Contains the code examples from The UVM Primer Book sorted by chapters.
verilator
A collection of Verilator examples
vim
The official Vim repository
wavedrom.github.io
Digital timing diagram editor
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