Example code for testing ARM lifting

[softsec-kaist]

Example code for testing ARM lifting

[soomin-kim]

Hi, thank you for your interest in MeanDiff.

Adding architectures without modifying current MeanDiff code is not supported yet, so if you want to test BAP and pyVEX for ARM, you need to fix MeanDiff.

1. StreamGen Modification
   You should modify StreamGen module, because current module only generates x86 or x64 instructions. Functions need to be fixed are, blackListGen, whiteListGen, and allGen. Former one is generating instructions based on black list, and the latter is based on white list. You can generate ARM instructions on your own systematic way, or just random instruction generation. You might need a module to check generated instructions are valid or not.
   Very simple (and dumb) implementation of blackListGen will look like:

let blackListGen arch path =
  let target = readLinesToList path
  match arch with
  | X86 ->
      // existing code
      ...
  | X64 ->
      // existing code
      ...
  | ARM -> // to support ARM, you need to add another type for indicating ARM in CmdOpt.fs
      [ "00000000" ] // this only generates an instruction, "andeq r0, r0, r0"

2. Lifter Modification
   Another modules you need to fix are MeanDiff-LifterPyVEX and MeanDiff-LifterBAP written in Python, and OCaml, respectively. You'll only need a small modification like giving an address of image base, or something else.

Please let me know if you have any further questions.

Thank you.