Compressed instruction decoder edge case not handled

[mikaelsky]

Compressed instruction decoder edge case not handled

[stnolting]

This was easy to fix. I think #797 addresses all the issues you have identified.

Thanks again for finding these loopholes! 👍

[mikaelsky]

I will take a look when I get into the office and put #797 through the riscvDV wringer :) If it works I'll shelve my patch :)

[stnolting]

Hey @mikaelsky. Thank you for reporting this. I just had another look at the C spec.

For C1 funct3 = 011 we have a few corners that seem to be mishandled.
We are not checking that imm5/shamt5 is 0: [...]

I agree. Not all bits of nzuimm are checked.

For C1 C2 funct3 = 100 we have some further corners that aren't detected. Specifically rs2 isn't checked.
[...]
For C2 we are not checking valid register values for some instructions

I also agree. The rs1/rd and rs2 fields are not checked if they are (not) zero.

I think this can be fixed quite easily. I'll draft a PR for this.