Related Issues (20)
- No tester dependency HOT 1
- FAME-1 transforms should more intelligently bundle target I/O into FAME channels HOT 1
- Master doesn't properly measure runtime, reports wrong simulation frequency HOT 4
- Make sure output dir exists before writing a conf file.
- Issue with subclasses in widget matching HOT 2
- step() in peek poke interface in simif is deceptive HOT 2
- Croak more obviously when the driver is mismatched with a bitstream.
- Update README to explain deps on RISCV toolchain. HOT 2
- midas is overdependent on rocketchip HOT 4
- SerialWidget's target-time behavior influenced by simulation stalls
- [DRAM model] queue-size setting by using mmReg
- Allow endpoints to specify initial token count in their channels. HOT 1
- [DRAM Model] Accept target-address offset and memory system size in configuration
- Remote set url for zc706_MIG HOT 4
- Remove requires where possible FASED functional model
- Synthesize Prints Cycle Count Mismatch
- Expose MSHRs as a runtime configurable settings.
- [MIDAS 2] Bring up FASED Configuration Generation
- Golden Gate Release Checklist
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