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Michael Levit's Projects

csi2rx icon csi2rx

Open Source 4k CSI-2 Rx core for Xilinx FPGAs

fmc_mipi icon fmc_mipi

FMC card to allow interfacing Xilinx FPGA boards with Jetson TX2 or TX1 via CSI-2 camera interface

kicad_mmccoo icon kicad_mmccoo

This is a repository to hold example and utility code for scripting within kicad (currently limited to pcbnew)

mipi_csi2_tx icon mipi_csi2_tx

VHDL code for using Xilnx LVDS lines for MIPI CSI-2 TX protocol. For educational purposes

nelder-mead icon nelder-mead

C implementation of the Nelder-Mead method for unconstrained optimisation

nelder-mead-in-c icon nelder-mead-in-c

C program which finds the minimum of a function using the Neld Mead simplex algorithm

neorv32 icon neorv32

A small and customizable full-scale 32-bit RISC-V soft-core CPU and SoC written in platform-independent VHDL.

riscv icon riscv

Open source ISS and logic RISC-V 32 bit project

rv icon rv

32-bit RISC-V CPU in ~800 lines of C89

tegra-eeprom-tool icon tegra-eeprom-tool

Tools for reading and writing identification EEPROMs on NVIDIA Jetson platforms.

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