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airo

basic-digital-image-processing-operations

booklistrazor

I made this project while taking ASP.NET Core 3.1 course on freecodecamp.org

gcd-verilog

FSM written in Verilog. Calculates GCD for two signed 32 bit numbers.

gif-library-tutorial-library

ASP.NET Core C# and Nuxtjs project

hw4-instr-data

hw8-decoder-control

Completed the decoder unit of the simple CPU, and added the datapath control logics

mealy-fsm

simple Mealy FSM done in verilog for Altera Cylcone V GX Starter kit. the code is written using three always statements. verilog file containing code with two always block is also included

parallel-to-serial-serial-to-parallel

parallel to serial/ serial to parallel shift register in Verilog

pc-module

Program Counter module. In adders, instead of +4 for byte addressing, use +1 (word addressing)

performance-optimisation-

platypus-sample-class

seven-segment-display-controller

seven segment display controller

shift-register

Shift register with a depth of 3 programmed in Verilog on Altera V GX Starter Kit.

simple-cpu

simple-processor-alu

uart

uart-1

Verilog UART

visiope

Vision and Perception project for 2021/2022 academic year at Sapienza University of Rome