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License: GNU Lesser General Public License v3.0
Experimental Haskell-to-HDL compiler
License: GNU Lesser General Public License v3.0
Let's start from a very primitive Haskell function:
abs :: Word -> Word -> Word
abs a b | a < b = b - a
| otherwise = a - b
Ideally, the Haskell function abs
should be compiled to a Verilog module
module abs (a, b, out);
input [0:63] a;
input [0:63] b;
output [0:63] out;
assign out = (a < b) ? b - a : a - b;
endmodule
To translate
module MaybePlus where
maybe_plus :: Maybe Int -> Maybe Int -> Maybe Int
maybe_plus (Just a) (Just b) = Just (a + b)
maybe_plus _ _ = Nothing
to
typedef struct {
logic ctor;
logic [63 : 0] body;
} MaybeInt;
module maybe_plus(MaybeInt a, MaybeInt b, output MaybeInt o);
assign o.ctor = a.ctor && b.ctor;
assign o.body = o.ctor ? a.body + b.body : 'x;
endmodule
Fixed-width integer computation is common in HDL simulation and design, but a rare case for programming languages. There should be pre-defined types for Haskell to model fixed-width integer computation of arbitrary width.
The ideal implementation for "arbitrary width" should be done at compile time, one type instance for one possible width, by template Haskell.
The expected sample usage of fixed-width integer types is like:
import FixedWidth
-- To declare a type Bit7, which is a fixed-width integer type of 7 bit
$(declareFW Bit7 7)
Fixed-width types are now derived from Int
and Word
, regardless of the specified width.
It is a waste to use Int
, which is usually 64bit, to represent a 7-bit fixed-width values.
To reduce memory cost, the fixed-width types should be represented by an integer type of width as few as possible. For example, the 7-bit fixed-width type should be represented by Int8
or Word8
, the 15-bit one by Int16
or Word16
.
^-^
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