Board file for Genesys ZU can be found at Digilents repository. (https://github.com/Digilent/vivado-boards/tree/master/new/board_files).
Each project has a script associated to him. For create the project, init Vivado in tcl mode, and the execute the selected script.
cd scrips/
vivado -mode tcl -source ./<tcl_name>.tcl
Projects in this repository are designed to run in Genesys ZU board from Digilent,
This repository include a python script for generate .mem files. Files generated by script are saved in /memory_content directory.
- custom_ip_acc: Project where a custom IP is created to accelerate an iterative root square compute.
If you need more information, yo can contact me on my email [email protected]