airloaf/v6502

6502 C++ Library

v6502's Issues

Implement Decimal Mode Instructions

ADC and SBC with decimal mode has not been implemented. Decimal mode article

Support for Unofficial Opcodes

If we look at the op code table we have defined, there are many gaps. These gaps represent unofficial opcodes. While they were not intended to be used as instructions, an actual 6502 cpu can still process it as an instruction.

NESDev Unofficial opcodes This site right here has a list of unofficial opcodes. It even details some NES games which utilize such opcodes. For a true NES emulator these would have to be implemented into the 6502 CPU library.

CPU Monitor

In order to run programs and ensure correctness of the CPU, a CPU monitor should be implemented.

Requirements:

• View all CPU registers
• View current location in memory (program counter)
• Print current instruction

Cycle Accurate Implementation

Currently we are only Instruction accurate since we are not modifying the registers and memory correctly per cycle. NES Dev wiki has a page on the CPU cycle details that should help in making a cycle accurate emulation of the 6502 processor. Cycle Details.

Remove Default case in instruction tick

The default case for this switch statement should never be called on, but it is required for successful execution of the processor. We need to figure out why this is the case and remove it.

Remove allocations for addressing modes and instructions

The CPU is very sluggish when running it on VNES. I can imagine it has to do with all the allocations that come into play when creating a new instruction as well as addressing modes. I think the best move will be to move the addressing mode functionality within the instruction class and we should only allocate a single instruction object and re-use it constantly. This should improve the CPU's performance greatly.

NesDev CPU Tests

On the NesDev wiki, there are many CPU tests which can test the correctness of our CPU. CPU Tests

Requirements:

• Implement test to check for NesTest.nes by kevtris
• Implement test to check for nstr_test_v5 by blargg

Tests and implementation for interrupts

We currently do not have tests for interrupts (BRK, NMI and IRQ).

We should test for the following scenarios

• IRQ during a BRK
• NMI during a BRK
• Properly returning from an interrupt
• IRQ when the I flag is set

Pipelined instructions

The 6502 performs some form of pipe lining. The first cycle of each instruction (getting the actual opcode of the instruction) occurs at the last cycle of the previous instruction. This is also why crossing page boundaries on some instructions causes an extra cycle to be thrown. See the cycle information for each instruction here

Use PDCurses for CPU monitor for Windows

PDCurses is a OpenCurses implementation for windows. We should look into this for implementing the CPU monitor for windows based platforms.
PDCurses

Change Address Bus to Memory Bus

The name Address Bus should be changed to Memory Bus. According to the datasheet, you write addresses to the address bus and then read the data for that corresponding address in the data bus. Memory Bus is a more suitable name since it both reads and writes into memory.

Unit Test Instructions Individually

The current tests for V6502 are difficult to write. They involve writing certain values into memory. We should unit test the instructions individually. In order to do so, we will need to extract each function and have the bare necessaries required to execute each individual instruction.

Remove get and set register file functions and replace with a single one

Instead of having a separate getter and setter for the register file, we should instead have a single register file function which returns a reference to it. This will allow modification and reading of the register file in one function.

Doxygen Documentation

Doxygen can create some good looking documentation web pages. This should be used when uploading a web format of the API.