aivan22/logic-gate-simulator

This logic gate simulator is a software tool that allows users to design and simulate digital circuits using fundamental logic gates

Logic Gate Simulator

This is a logic gate simulator that allows users to design and simulate digital circuits using fundamental logic gates such as AND, OR, XOR, Half adder, and Full adder. The simulator provides an intuitive interface for creating and visualizing circuits, and supports binary inputs and outputs.

Installation

To use the simulator

git clone https://github.com/rohansx/logic-gate-simulator.git

Usage

To launch the simulator, navigate to the directory where you cloned the repository and run the index.html file

Issues

If you encounter any bugs or issues while using the simulator, please open an issue in the issue tracker. Be sure to include a detailed description of the problem, as well as any error messages or steps to reproduce the issue.

Roadmap

We have several ideas for expanding the functionality of the simulator, including:

• Implementing a NOT gate
• Adding support for different data types
• Including more complex logic gates

If you would like to contribute to any of these efforts, please let us know!

License

This simulator is released under the MIT License. Feel free to use and modify this code as you see fit.

Demo

visit: https://rohansx.github.io/logic-gate-simulator/index.html