arachnidlabs / cyflash Goto Github PK
View Code? Open in Web Editor NEWBootloader tool for Cypress PSoC series microcontrollers.
License: BSD 2-Clause "Simplified" License
Bootloader tool for Cypress PSoC series microcontrollers.
License: BSD 2-Clause "Simplified" License
As there are quite a few improvements, it might make sense to update the version.
Hi,
When I enable the --verbose mode, cyflash crashes with the following traceback
Traceback (most recent call last):
File "..\Scripts\cyflash-script.py", line 11, in <module>
load_entry_point('cyflash==1.7', 'console_scripts', 'cyflash')()
File "..\lib\site-packages\cyflash\bootload.py", line 396, in main
args.psoc5)
File "..\lib\site-packages\cyflash\bootload.py", line 254, in bootload
self.enter_bootloader(data)
File "..\lib\site-packages\cyflash\bootload.py", line 304, in enter_bootloader
silicon_id, silicon_rev, bootloader_version = self.session.enter_bootloader(self.key)
File "..\lib\site-packages\cyflash\protocol.py", line 388, in enter_bootloader
response = self.send(EnterBootloaderCommand(key))
File "..\lib\site-packages\cyflash\protocol.py", line 380, in send
self.transport.send(packet)
File "..\lib\site-packages\cyflash\protocol.py", line 432, in send
print("s: 0x%02x" % ord(char))
TypeError: ord() expected string of length 1, but int found
Is this a known problem?
Hello,
I am having an issue with cyflash when I attempt to flash my psoc 5lp dev kit over uart. I keep getting the following error
cyflash.bootload.BootloaderError: Invalid checksum type: 0
I have tried using both basic summation as well as CRC16, both with the same result. I know there is a known bug with v1.5 of the bootloader, however after making the suggested change to the bootload_pvt.h, I still get the same result.
We (the Mission Pinball Framework) would like to use cyflash as a library to flash Open Pinball Project boards which use PSoC boards. We would like to use BootloaderHost and make_session in our code to flash multiple boards. Would you be up to a PR which would separate out the command line parts from bootloader.py to enable our use case?
Hi,
I tried to use cyflash in Ubuntu to flash the PSOC 5 and it doesn't work. This is what I did:
sudo cyflash --serial=/dev/ttyUSB0 --serial_baudrate 115200 <psocFirmware.cyacd>
and after that I get this message:
Initialising bootloader.
Silicon ID 0x2e129069, revision 0.
Array 0: first row 23, last row 255.
Array 1: first row 0, last row 255.
I checked the PSoC and it didn't work. It seems it stops half way through in loading the firmware image.
It works fine in windows using UART bootloader Application host software.
Does anyone know what might be the problem??
I have both RX/TX buffer size set to 64 bytes in both bootloader and bootable project.
I tried bootloader with checksum type: Basic Simulation and it didn't work. I got checksum error and then I change the type to CRC-16-CCITT and it works but then it stuck as I mention it above (output).
Hi,
I just started to work on a GUI based on cyflash so users who are not very familiar with the command line can also use cyflash. And also to learn how to develop GUIs using python and pyside2.
If anyone is interested to try it, you can found the repo here. It's on alpha state, I have implemented only the serial transport layer and used it with a CY8CKIT-059 prototyping kit. Bug reports, feature request are very welcome.
Hi, firstly thanks for develop FOSS for PSoC.
I just clone your repository to test the AN68272 from Cypress using the CY8CKIT-059 board, already test it with the host tool that Cypress provide and the bootloading is sucessfull, but when i try to upload the .cyacd file with your tool it give the following error:
> cyflash --serial=COM9 --serial_baudrate=57600 Bootloadable.cyacd
cyflash: error: one of the arguments --canbus_echo --canbus_wait is required
Then i used:
> cyflash --serial=COM9 --serial_baudrate=57600 --canbus_wait=500 Bootloadable.cyacd
Entering bootload.
Initialising bootloader.
Silicon ID 0x2e161069, revision 0.
Verifying row ranges.
Array 0: first row 28, last row 255.
Array 3: first row 0, last row 255.
Checking metadata.
Traceback (most recent call last):
File "C:\Python27\Scripts\cyflash-script.py", line 11, in <module>
load_entry_point('cyflash==1.6', 'console_scripts', 'cyflash')()
File "build\bdist.win-amd64\egg\cyflash\bootload.py", line 305, in main
File "build\bdist.win-amd64\egg\cyflash\bootload.py", line 196, in bootload
File "build\bdist.win-amd64\egg\cyflash\bootload.py", line 231, in check_metadata
File "build\bdist.win-amd64\egg\cyflash\protocol.py", line 271, in get_metadata
File "build\bdist.win-amd64\egg\cyflash\protocol.py", line 252, in send
File "build\bdist.win-amd64\egg\cyflash\protocol.py", line 101, in decode
File "build\bdist.win-amd64\egg\cyflash\protocol.py", line 33, in __init__
TypeError: super() takes at least 1 argument (0 given)
I read in a PR about the super() function, so i tried using python 3
> py -3 -m cyflash --serial=COM9 --serial_baudrate=57600 --canbus_wait=200 Bootloadable.cyacd
Entering bootload.
Initialising bootloader.
Silicon ID 0x2e161069, revision 0.
Verifying row ranges.
Array 0: first row 28, last row 255.
Array 3: first row 0, last row 255.
Checking metadata.
Cannot read metadata from device: Command unsupported on target device
Starting flash operation.
Unhandled error: The data is not of the proper form
So i guess this is not 5LP compatible ;(
Thanks again for the tool.
Carlos
[OT] Saw a couple of PR that improve a lot of stuff on the tool, those will be merged?
Not really a issue,
Regards.
Carlos
I'm running CyFlash (On both Python2 and Python3) over a Canbus interface. Between a linux computer with a can interface, and a Psoc device.
I've used the example CANbus_Bootloader.c file to implement a basic canbus bootloader on our device which appears to run and begin communicating back. It properly enters the bootloader and returns data about the silicone ID, then it enters the "Verifying row ranges" section of processing and hangs.
The stack trace I list might be off by a bit, as I reformatted some of the line spacing to conform with PEP-8 standards.
The stack trace is approximately:
bootload.py, line 303, in main
bootload.py, line 192, in bootload
bootload.py, line 2016, in verify_row_ranges
protocol.py, line 271, in get_flash_size
protocol.py, line 258, in send (which is BoorloaderSession.send)
protocol.py, line 268, in recv (which is CANbusTransport.recv)
socketcan, line52, recv:
[], []. timeout)[0]) > 0:
Looking on a CAN Analyzer, I see the following traffic:
6.344 s - Message 1(Enter Bootload?):
0x01, 0x38, 0x00, 0x00, 0xA0, 0x09, 0x17
6.345 s - Response(Silicone ID, Silicone Rev, Bootload Rev?):
0x01, 0x00, 0x08, 0x00, 0x69, 0x30, 0x12, 0x2E
0x00, 0x32, 0x01, 0x01, 0x55, 0x62, 0x17
6.418 s - Message 2(get Flash Size?):
0x01, 0x32, 0x01, 0x00, 0x00, 0xEB, 0x6B, 0x17
So it seems that the Bootloader is not replying to this second message requesting it's size.
Hi,
Thank you very much for the cyflash tool. I use it to flash over CAN bus and I managed to get it up and running. One thing I was not aware of until I looked into the protocol.py code is that the arbitration ID is filtered with 0x700. I had my PSOC with an ID that was causing cyflash to throw invalid frames. After I assigned the PSOC an ID that would successfully pass the arbitration ID filtering everything went fine.
I'm writing this because I think users should be aware of the arbitration ID filtering - maybe just adding a short line in the readme.
Thanks. R.
Hello, I wanted to know if it is possible that cyflash can be used through a tcp/ip port, I have a psoc microcontroller but the way to access it is through a tcp/ip gateway and I see that cyflash only works through a serial port, otherwise it is It is possible to adapt it. Do you know if there is something like this on the market, to update the firmware of the microcontroller with a .cyacd file through tcp/ip?
What are the priorities with Python 2 and 3 compatibility? As it currently stands the code is not fully compatible with with both versions. Since this is a utility that installs and runs independently, I'm not sure Python 2 support needs to be a priority. Most systems have both installed, and some just python3, so it can be insatalled via python3 setup.py install
easily enough.
If compatibility is important, I'll recommend adding the future
module as a requirement. If Python2 support isn't important, I'll clean up things for a pure Python3 package.
I have a CY8CKIT-049-42xx which I attempted to use cyflash to upgrade. It initially gave an error that was BootloaderError: Invalid checksum type: 0. Looking at the cyacd file, there are 16 bit checksums at the end of each line. Trying the simplest jury rig, (i.e. changing the checksum type to 1), gave the following error:
python -m cyflash --serial COM10 Gen2.cyacd
Initialising bootloader.
Traceback (most recent call last):
File "c:\Python27\lib\runpy.py", line 162, in run_module_as_main
"main", fname, loader, pkg_name)
File "c:\Python27\lib\runpy.py", line 72, in run_code
exec code in run_globals
File "build\bdist.win32\egg\cyflash__main.py", line 2, in
bootload.main()
File "build\bdist.win32\egg\cyflash\bootload.py", line 217, in main
"Device app ID %d is different from local app ID %d. Flash anyway? (Y/N)"))
File "build\bdist.win32\egg\cyflash\bootload.py", line 121, in bootload
self.enter_bootloader(data)
File "build\bdist.win32\egg\cyflash\bootload.py", line 146, in enter_bootloader
silicon_id, silicon_rev, bootloader_version = self.session.enter_bootloader()
File "build\bdist.win32\egg\cyflash\protocol.py", line 240, in enter_bootloader
response = self.send(EnterBootloaderCommand())
File "build\bdist.win32\egg\cyflash\protocol.py", line 235, in send
return command.RESPONSE.decode(response, self.checksum_func)
File "build\bdist.win32\egg\cyflash\protocol.py", line 79, in decode
raise InvalidPacketError()
cyflash.protocol.InvalidPacketError
I'm using version 1.06 of cyflash, 1.30 of the Cypress bootloader. Before starting the cyflash program, I force the card into the bootloader while holding the button during boot.
I ran into a couple of bugs relating to chips with multiple flash arrays.
In verify_row_ranges() you call get_flash_size(array_id) which for my 128K PSoC 5 returns (0, 511). 511 is the last flash row for the whole chip, not for the current flash array. At least for the 128K PSoC 5 series there are two flash array, each with 256 rows. I haven't found a Cypress Programming Protocol document so I don't know what get_flash_size is suppose to return. I just hacked verify_row_ranges() to use 255 instead of 511. Works in my case but it's not a general solution. If get_flash_size() returns the total flash array size you'll need knowledge of individual chip array sizes.....
Additionally, in check_metadata() you fetch the metadata_row. Your code currently indexes off of the first flash array but for larger chips the metadata is, of course, found in the last flash array, not the first one. I changed the line to
metadata_row = data.arrays[max(data.arrays.keys())][self.row_ranges[max(data.arrays.keys())][1]]
This seems to work fine, but I might not understand how row_ranges works.
Otherwise, great work. Exactly what I needed.
--Jeff
Hi,
Would it be useful to add a command to get metadata from a cyacd file without the need of flashing a device?
Regards.
Is there any chance you could update pypi to the latest version of this repository? https://pypi.python.org/pypi/cyflash/. That would be a huge help when using cyflash as a dependency in our project.
Did Cypress fixed the issue of the #define Bootloader_RSP_SIZE_GET_METADATA (0x56u) in Bootloader_PVT.h should be #define Bootloader_RSP_SIZE_GET_METADATA (56u) on the current Creator 4.1?
If not, the new "way" they upload components without requiring to wait for the next Creator release might resolve this problem, or at least make it easier to resolve.
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