bit-hack/fake86

Fake86 emulator redux

fake86's Issues

Reimplement video emulation routines.

The original video emulation routines could be cleaner in design and have better compatibility.
Re-write these and target the widest range of support we can.

Use nanoseconds for emulator timing

Use nanoseconds in main loop to keep all elements synchronized.
Main loop publishes how many nanoseconds have elapsed to each peripheral.
Convert nanosecond slice to cycles for cpu emulation call.

Enhance VBlank and HBlank polling

Currently every 15 cycles the CPU emulator invokes a timing routine to update port 03DAh (bits 3 and 0). This gives poor granularity of updates, and pro-active updates can be wasted.
Re-calculate these fields only when the register is read, using the current cycle number as a guide.
This would give cycle exact granularity and reduce the computational cost overall.
This can be integrated into the new video system, but can be back ported into the old one too.
At the same time we can update the screen buffer when we enter the vblank period, for better synchronization with our emulation and avoid tearing.

Update PIT timer tick code

We should be able to query the PIT for the number of cycles before it next triggers and IRQ.
Then we can tick the cpu for that number without having to explicitly update the PIT.

This will let us remove the 15 cycle timing update in the CPU as well as increase the accuracy of the emulation.

All PIT channels need their own latch.

As the title says each channel needs its own counter latch, as they are not shared.