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47.0 13.0 2.0 120.08 MB

A graph linear algebra overlay

License: BSD 3-Clause "New" or "Revised" License

Makefile 1.03% Python 0.39% C++ 95.89% Shell 0.63% C 2.07%
fpga-programming high-level-synthesis open-source-hardware graph-processing

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huyuwei avatar yxd97 avatar zzczzc20 avatar

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wrs225 aminsahebi

graphlily's Issues

Deadlock happens after scaling SpMSpV to 8 HBM channels

After fusing the three interfaces of one matrix partition (partptr, indptr, packets) into a single interface (commit: 1409b0d), we are now able to scale SpMSpV to up to 32 channels.

Deadlock happens when I benchmark an 8-channel SpMSpV. On uniform_10K_10, it passed the first iteration and ran into deadlock after several iterations; on ogbl_ppa_576K_42M, it ran into deadlock at the first iteration. With hardware emulation, there is no deadlock. I tried increasing the FIFO depth, but deadlock still happens.

@yxd97 Please take a look at this issue later when you have time. It might be related to the shuffler. Also check the data loader and stream merger.

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