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Hardware_description_language

##Вопросы 0) Что такое ПЛИС.

  1. Сходства и отличия ПЛИС FPGA и CPLD

  2. Соединение модулей в языке Verilog HDL

  3. Описание модуля в языке Verilog HDL

  4. Запись чисел

  5. Регистры и цепи

  6. Триггеры и защелки

  7. Тестбенчи и их синтаксис

  8. Always - блоки

  9. Структура if/else и case

  10. Синхронная логика, синхронный и ассинхронный сброс

##Уметь реализовывать:

  1. Дешифратор(декодер) используя поведенческо описание

  2. Мультиплексор

  3. Триггеры

  4. Регистры и элементы памяти

  5. Сумматоры

  6. Счетчики

  7. Уметь работать в синхронной логике

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