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Exchange data packets between HPS and FPGA on Intel Cyclone SoC

Verilog 15.90% Makefile 0.09% Shell 0.68% C 5.77% Mathematica 0.01% Stata 0.12% Tcl 1.66% V 36.93% SystemVerilog 21.07% Coq 11.87% HTML 5.22% VHDL 0.13% Haskell 0.54%

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