dreylago/logicmin

Logic Minimization in Python

logicmin's Issues

Typo in README

In the Full Adder example in the README, I guess one bracket is missing here:
https://github.com/dreylago/logicmin#full-adder
Specifically, the following line:
print(sols.printN(xnames=['Ci','a','b',ynames=['s','Co'], syntax='VHDL'))
should be:
print(sols.printN(xnames=['Ci','a','b'],ynames=['s','Co'], syntax='VHDL'))
Thanks for the great job!

Allow using '-' in input

Say, I want all possible inputs ending with '000' to be mapped to a certain output:

import logicmin
t = logicmin.TT(7,16)
t.add("----000","0100000000000010")

logicmin would then generate all possibilities by itself

Strange cases

I found strange solutions to some inputs.

If you take this example:

t = logicmin.TT(4,4)
t.add('0001', '0001')
print(t.solve().printN())

The output is:

y0 <= x3'.x2'.x1'.x0
y1 <= 0
y2 <= 0
y3 <= 0

I would think y0 should be either 1 or x0. Basically the same solution is presented for 3 bit.

If you use 2 bit input/output, the output gets:

y0 <= 1
y1 <= 0

generation error

I've noticed that if you put this truth table, you get a bad output:

import logicmin
tt = logicmin.TT(4, 3)
tt.add('0000', '001')
tt.add('0001', '011')
tt.add('0010', '---')
tt.add('0011', '110')
tt.add('0100', '---')
tt.add('0101', '---')
tt.add('0110', '100')
tt.add('0111', '---')
tt.add('1000', '011')
tt.add('1001', '001')
tt.add('1010', '---')
tt.add('1011', '101')
tt.add('1100', '001')
tt.add('1101', '---')
tt.add('1110', '---')
tt.add('1111', '100')
X = tt.solve()
printN(syntax = 'AST')

you get this output:

y0 <= x3 and  not(x2) or  not(x1)
y1 <= x3 and  not(x2) and  not(x0) or  not(x3) and x0
y2 <= x1

and if we create python function using this instructions:

def f(x0, x1, x2, x3):
    y0 = x3 and  not(x2) or  not(x1)
    y1 = x3 and  not(x2) and  not(x0) or  not(x3) and x0
    y2 = x1
    return y2, y1, y0

and recreate the truth table:
{"".join(map(str, (i, j, k, l))):''.join(map(str, map(int, f(i, j, k, l)))) for i in range(2) for j in range(2) for k in range(2) for l in range(2)}
that's give this output:

{'0000': '001',
 '0001': '011',
 '0010': '001',
 '0011': '001',
 '0100': '100',
 '0101': '111',
 '0110': '100',
 '0111': '100',
 '1000': '011',
 '1001': '001',
 '1010': '011',
 '1011': '001',
 '1100': '110',
 '1101': '101',
 '1110': '110',
 '1111': '100'}

And this is not the input truth table