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LLVM CodeGen Benchmark

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This repository contains instruction sequences sampled from llvm-opt-benchmark.

Please cite this work with the following BibTex entry:

@misc{opt-benchmark,
  title = {LLVM Opt Benchmark},
  url = {https://github.com/dtcxzyw/llvm-opt-benchmark},
  author = {Yingwei Zheng},
  year = {2023},
}

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llvm-codegen-benchmark's Issues

Update diff June 1st 2024, 5:00:55 pm

from: llvm/llvm-project@598f37b
to: llvm/llvm-project@ee8e0f3
commit: c134d37

Change Logs

from 598f37bb27c3a6e71252bbd15c587c7f11e20520 to ee8e0f3365c6b27c8a82fafa1dd4af10e16384f5

ee8e0f3365c6b27c8a82fafa1dd4af10e16384f5 Fix order of include flags for the target & regular include paths. (#93547)
867c9f67132799d9f422866bc4b8790257118c47 Fix permissions on restarter workflow
661d64bc20d58c4970b378dd3e87ee594d2b4150 [NVPTX] disable combine-mad test for newer ptxas (#93919)
e9057c30a48cb502864063540a43d755dacd3b1c Create check run on workflow run to better display result.
86bb5c8427346aafaafa42fbf96e405ae4ca07bf Create annotations to better explain restarter decision
2b1dfd2b35b5684c8af85206e199152bd6ac3a8d [DAG] Replace getValidShiftAmountConstant helpers with getValidShiftAmount helpers to support KnownBits analysis (#93182)

Update diff April 29th 2024, 6:50:20 am

from: llvm/llvm-project@3785d74
to: llvm/llvm-project@dc7834b
commit: 13c5f6e

Change Logs

from 3785d7424680e0bcb914a485af61be51559ab1ba to dc7834b76c187bdf3b260c66445b750ed8d99507

dc7834b76c187bdf3b260c66445b750ed8d99507 [ProfileData] Use static_assert instead of assert (NFC)
b3c55b707110084a9f50a16aade34c3be6fa18da [SelectionDAG] Handle more opcodes in canCreateUndefOrPoison (#84921)
6cd6bde3090a405e4091ef6f743cb2e56b376a55 [RISCV] Remove -riscv-v-fixed-length-vector-lmul-max from arith tests (#89886)
501cfd5243c025b22075e1f13817a0a37fef96a6 [X86] Use static_asserts instead of assert (NFC)
fa8fda85c6792d9078922ab8658c321c4939e63a [mlir][Bazel] Add missing dependency after 145176dc0c93566ce4aef721044d49ab8ba50f87

Update diff June 7th 2024, 11:32:36 pm

from: llvm/llvm-project@0cdb0b7
to: llvm/llvm-project@7536474
commit: 565791a

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Change Logs

from 0cdb0b7473595c3b0ac8840f9089d742dc206725 to 7536474ea723f84db791ce5b6c3fc0cefbc2cceb

7536474ea723f84db791ce5b6c3fc0cefbc2cceb [MemProf] Add matching statistics and tracing (#94814)
6b4c12284795a3030e37b17047271a47a69bb587 [mlir][loops] Add getters for multi dim loop variables in LoopLikeOpInterface (#94516)
33f4a77d9218c1a2d5c994a8a8398479731612dc Reland "[python] Bump Python minimum version to 3.8 (#78828)"
32d8596ad99683cb896d122006436609b4ef3b6b [RISCV] Remove unused tablegen multiclasses. NFC
4346c3859c2db76b5928b9754f4965ec3d3fddf7 [libc][math][c23] Temporarily disable fmodf16 on AArch64 (#94813)
c4f83a004bf35bfc46fe89111fdca750bbc724da [clang-tidy] new check misc-use-internal-linkage (#90830)

Update diff April 16th 2024, 1:51:14 am

from: llvm/llvm-project@c50f7e9
to: llvm/llvm-project@2e26ee9
commit: 2973ba7

Change Logs

from c50f7e9a425bfa4ab8655c79a715c88ed3b1e830 to 2e26ee9dce32d12ffa9bfb7f7d3e97778f0b7a75

2e26ee9dce32d12ffa9bfb7f7d3e97778f0b7a75 [DWARF] Clarify a variable name. NFC (#88814)
d23a85066b5d89a47fde7b6777e0fc5a711b99d4 InstCombine: Increase threadlocal.address alignment if pointee is more aligned (#88435)
8aa7e378dee27ec81959ef6750a7dd07cefdc77d [InterleavedAccessPass] Get round the unsupported large scalarize vectors (#88643)
2ac562ab784c6bf04e6d3026c567d3552a735668 [Sema] Mark alias/ifunc targets used and consider mangled names
694c444b5bbb56dcba8978d283fe5385237c309a [gn] port 311ff3917827 more
40bbdb609f58d6cbbae1ca525832d7a21641a347 Revert "[DAG] Fold extract_subvector(insert_subvector(x,y,c1),c2) --> extract_subvector(y,c2-c1) (#87925)"
2b06ff555aa32b316710b4708fbc16f36d6eab15 [RISCV] Expand mul to shNadd x, (slli x, c) in DAGCombine (#88524)

Update diff May 22nd 2024, 11:47:49 am

from: llvm/llvm-project@e5936b2
to: llvm/llvm-project@f685481
commit: 2a1a31e

Change Logs

from e5936b245e9af0cea69a7e4eae22a05b7ffcf5a3 to f68548135b8f9a02beac842646ab89bcaad9d400

f68548135b8f9a02beac842646ab89bcaad9d400 [clang][Interp] Fix checking unions for initialization
bbc4c2e047107c62d49ce1e0474635ea55a2b006 [DAG] SimplifyDemandedBits - ensure we have simplified the shift operands before folding to AVG
8619054fb76ad0ceb9c3b1c90e643bd469daecf8 [gn build] Port 11b97da83141
9604e5ce8b5607cd88ba130314fc7ae8545542e1 [clang][Interp] Allow stepping back from a one-past-the-end pointer
c912f0e773386cc309155b78e2441ee5f1052c13 [mlir][python] Add bindings for mlirDenseElementsAttrGet (#91389)
25c021a8638d203022128edb1be9000134bfe24f [NFC] Fix typo in llvm/test/Transforms/Util/add-TLI-mappings.ll
9051fc706fd5f4517fa880e6cb7a1ba9e4c0483d [NFC][LLVM] Fix typos in llvm/test/MC/AArch64/SVE
5bd210ace6c165d5093220811ba8d5fc300ac1f9 [NFC][LLVM] Autogenerate check lines for some Analysis/LoopAccessAnalysis tests.
3c5738f3ec185fbf56da2c18929f5b33126cd98b Revert "[indvars] Missing variables at Og (#88270)" (#93016)
9807f25baa98be3bcce579302b2348b8abaf5cbd [flang][HLFIR] Adapt OptimizedBufferization to run on all top level ops (#92898)

Update diff April 24th 2024, 4:11:05 pm

from: llvm/llvm-project@21ef187
to: llvm/llvm-project@fc13353
commit: 89d1c93

Change Logs

from 21ef187654c819fd097171afcc6c9855dccdb36d to fc13353e10b443101b7304c5f90d70a06e20e589

fc13353e10b443101b7304c5f90d70a06e20e589 Revert "[RISCV] Separate doLocalPostpass into new pass and move to post vector regalloc (#88295)"
fb302b19443ceb5a79628bb0f83383a3e96a4b74 [mlir][ArmSME] Move tests out of vector-ops-to-llvm.mlir (#89905)
e0adf63afc33a1e7fd4494c4f327d5ee4082b393 [lldb] fix python extension debug suffix on Win (#89037)
a61f9fe31750cee65c726fb51f1b14e31e177258 [Inline][Cloning] Defer simplification after phi-nodes resolution
c1d00510ab5e7f5052efb1e678173e3a97302e61 [Inline][Cloning] Introduce test for PR87963 (NFC)
b4f923e9124c5ec0619a962deb386dd9b52a29be [RISCV] Strength reduce mul by 2^M - 3/5/9 (#88993)
a38f201f1ec70c2b1f3cf46e7f291c53bb16753e [CMake][Release] Add stage2-package target (#89517)
418bdb49a758a5b3a128781a819b4e160521b7ed [clang][RISCV] Remove LMUL=8 scalar input for some vector crypto instructions (#89867)
a682f528d4d2523c044ab08cf3a8ecfd8e42760d [IR][test] Fix warning in MMRA tests
e1aa16299f626317068c3d99e035d447145353c7 [Mips] Use ANDi in for zero-extend in subword atomic umax/umin for both r2 and pre-R2 (#89881)
50082d64e633b9baa918a209fc9105aa330b89fa DAG: Fix widening of fptrunc_round vectors (#89918)

Update diff June 20th 2024, 3:52:20 pm

from: llvm/llvm-project@40a0ad2
to: llvm/llvm-project@bed2eb6
commit: 239fce0

Change Logs

from 40a0ad2af3b6305fbabec003e51dad62564aa019 to bed2eb64de05d0e1f5a8494e8c0f44b24d41dd18

bed2eb64de05d0e1f5a8494e8c0f44b24d41dd18 [GenericDomTreeConstruction] Use SmallVector (NFC) (#96138)
f1ce6a465d09f9527151f2f36c19072d2091cbaa [libc][arm] implement a basic setjmp/longjmp (#93220)
abad8455ab08d4ca25b893e6a4605c1abe4aac02 [mlir] Expose skipRegions option for Op printing in the C and Python bindings (#96150)
d4bfc4a821dfcb1bc2445dc21c30eacdb7b90197 [RISCV][NFC] Cleanup SCR1 sched model (#96088)
e3eb12cce97fa75d1d2443bcc2c2b26aa660fe34 [Clang][AMDGPU] Add a builtin for llvm.amdgcn.make.buffer.rsrc intrinsic (#95276)
67226bad150785f64efcf53c79b7785d421fc8eb [Support] Vendor rpmalloc in-tree and use it for the Windows 64-bit release (#91862)
2e515ed60a6d63610a7b0d485158ca4d32f9cbce [clang] Move 'alpha.cplusplus.MisusedMovedObject' to 'cplusplus.Move' in documentation (NFC) (#95003)
3e55ac94c7502d69c71bda0948a8353a6622da6e [RISCV] Strength reduce mul by 2^N - 2^M (#88983)
67f5312c41a072aaa725b5943cce2aa0f1643781 [clang][Interp] Nested ThisExprs that don't refer to the frame this ptr
2ae6889d3f6c6bbe8390d6b1686c6583492b44a2 [SPIRV] Add trig function lowering (#95973)
fa6d38d61afff695357977853ec17d0b7cc8e975 [AArch64][TargetParser] Split FMV and extensions (#92882)

Update diff April 24th 2024, 9:40:15 am

from: llvm/llvm-project@cf328ff
to: llvm/llvm-project@e400e90
commit: 0b07efe

Change Logs

from cf328ff96daf5e676fb51ac86e550af7fd689fec to e400e908b2d97529b1a65dd0bdad80d481c39527

e400e908b2d97529b1a65dd0bdad80d481c39527 [ORC] Fix SpeculativeJIT example after 7da63426ac5 (ORC dispatch unification).
945eeb2d92758ef907ef3aeb3251fadc64b731b3 [InstCombine] Simplify (X / C0) * C1 + (X % C0) * C2 to (X / C0) * (C1 - C2 * C0) + X * C2 (#76285)
d149370900844cca3fec06bb078eb8d85008f72d [RISCV] Add test coverage for commutable RVV instructions
91526d64a8adb14edc55adfd5270858791822837 [libcxx] [modules] Add _LIBCPP_USING_IF_EXISTS on aligned_alloc (#89827)
46163688e111956a9aeb3a35b8f85a40ef7035d0 [AMDGPU] Allow WorkgroupID intrinsics in amdgpu_gfx functions (#89773)
788d1598212b402057889f5eb973b8665a735d04 [libc][bazel] Allow configure options to alter all targets (#89251)
603ba4c59635ff5f8a54d1106719124aee20271d [RISCV] Separate doLocalPostpass into new pass and move to post vector regalloc (#88295)
c071c1d3abfedaf081d77308a24bb38c061ff999 [SPIR-V] New validation tests for pointer and primitive types (#89632)
601d0caf3b347a666b59928e4c3ad6b8e3d1d35c [lldb][Docs] Convert GDB protocol extensions doc to Markdown and add to website (#89718)
69703b1f94ac8e5c03bd39d0a581bf6e553545e4 [ORC] Fix bot failure due to 7da63426ac5 (ORC task dispatch unification).
71c5964f5c0686be3319bc55a0dbfb0e3a60a917 [ARM][AArch64] autogenerate header file for TargetParser from Target tablegen files (#88378)
662ef8604268b207910225ecca90daf30a46720b [clang][NFC] Remove useless code in ASTWriter
62db43497fb019d0ac0677ae0c9ea2eba136b230 [lldb] Enable support for Markdown documentation pages (#89716)
b933c8447b2a8797a882d3506460f49fb6f7bf34 [ValueTracking] Add support for trunc nuw/nsw in isKnowNonZero
b3ca9c30dedf28ecf687779294c1343a840bfd35 [ValueTracking] Add tests for isKnowNonZero of trunc nuw/nsw; NFC
78ebaa2d798f939e35e44778572eb54c4bf36550 [ORC] Fix build failure (NFC)
9a8235a290b87a311217b9ffd811de06bff38746 [ORC] Fix -Wunused-variable in LLJIT.cpp (NFC)
46b011d0ccb468613bcc7e9e756518f9f383001d [gn build] Port cf328ff96daf
008b7f1dfdba5cd0479cbb0348d84d0eeb8b5d46 [flang] implement capture of procedure pointers in internal procedures (#89619)
9375962ac9e8d8e83fa8e32c3b04bb6970e4b242 [TableGen][GlobalISel] Specialize more MatchTable Opcodes (#89736)
7da63426ac5d9719038842c30ca2a644620be071 Re-apply "[ORC] Unify task dispatch across ExecutionSession..." with more fixes.
ad4a42bbc7f8d27d8e91b69dbd3282cf873d418e [RISCV] Remove -riscv-split-regalloc flag (#89715)
806db47b060b6e70cc71ee5ce8052829f85e6469 [IR] Remove unused variable in Verifier.cpp (NFC)

Update diff May 15th 2024, 5:05:31 am

from: llvm/llvm-project@2ece5cc
to: llvm/llvm-project@d3455f4
commit: 7fd8889

Change Logs

from 2ece5cc2bb1b4cc787e33e24a6582043d441a572 to d3455f4ddd16811401fa153298fadd2f59f6914e

d3455f4ddd16811401fa153298fadd2f59f6914e [libc][docs] Fix outdated code review section, as per #91934 (#92051)
a71e2b9d0f287e4927e51d6764f90e492ba136e1 [libc][errno] Remove non asm generic error number (#92172)
1a58e88690c1a48d1082b4ee6b759f5dc49a7144 [RISCV] Move RISCVInsertVSETVLI to after phi elimination (#91440)
72b2c37de6a4bbc2b2d2cda49293684b7cc71508 [clang-format][NFC] Clean up TokenAnnotator::mustBreakBefore()

Update diff May 9th 2024, 10:49:50 pm

from: llvm/llvm-project@5a0e0b6
to: llvm/llvm-project@5d51db7
commit: 5c1d002

Change Logs

from 5a0e0b659fb5c652c66a083224bf300b4ae32452 to 5d51db75e46155d0f3d70cf3253d3b075cfcf93a

5d51db75e46155d0f3d70cf3253d3b075cfcf93a [mlir][affine] Use alias analysis to redetermine intervening memory effects in affine-scalrep (#90859)
ba66dfb11bcaef5e0dc21358b3712b491d61d020 [lldb] Fixed SyntaxWarning: invalid escape sequence [ \d \s (#91146)
04ce10357b485e5e03480b1ca2e91e75c50b1fef [mlir][SCF] Avoid generating unnecessary div/rem operations during coalescing (#91562)
8466480bdad9d1ef858329ec51cd910c419036a0 [ProfData] Remove unused variable in unittest
a3457369cd12b093185a5bda3443e08a4390f3ed [Orc] Fix -Wsign-compare warnings in unittest
dfff57e751f6bae12172a1a246e1f8b33db042f8 [RISCV] Add isel special case for (and (shl X, c2), c1) -> (slli_uw (srli x, c3-c2), c3). (#91638)

Update diff April 16th 2024, 7:22:07 pm

from: llvm/llvm-project@aefff77
to: llvm/llvm-project@7d4e8c1
commit: 534d665

Change Logs

from aefff774a0d6f75565243263555f2513ac3c9fdf to 7d4e8c1f3bbfe976f4871c9cf953f76d771b0eda

7d4e8c1f3bbfe976f4871c9cf953f76d771b0eda [SLP]Attempt to vectorize long stores, if short one failed.
c7657cf7d1ee57f9cb9133164536591a1842b43c [SLP]Keep externally used GEPs as GEPs, if possible instead of extractelement.
5422eb0b841521908c2fc60bd9c7fdc11ded12a1 [memprof] Add another constructor to MemProfReader (#88952)
0665669876cd7f51f7572cff3bb97485d78f5de5 [Sema] Mark alias/ifunc targets used and consider mangled names
8885813ebb0a61014d99ac776b8118d935848cc9 [libc++][chrono] Disables a test.
bbd64c4ddf08be468ab4eb4c161e28bdab6808bb [RISCV] Add coverage for strength reduction of mul as 2^N - 2^M
9ec8c961664de3b3fcc1cbd5238e40ec8c9bdddb [clang][dataflow] Expose getReferencedDecls and relocate free functions. (#88754)
b01879ec1ffbd249f9bf3c4f32308443be6ac36b [MLIR][XeGPU] Add XeGPU scattered ops (#86594)
5c6af605b307213453a9a043532b9293db21b5c6 [Clang][Sema] placement new initializes typedef array with correct size (#88902)
edb711d2f318b17489692b5f85028fab7ed85b83 [InstCombine] Update vector_reduce_and tests to actually use llvm.vector.reduce.and; NFC
481bd5d416df7a1d24e18cc81ae782e8701de965 [mlir][sparse] introduce sparse_tensor.extract_iteration_space operation. (#88554)
b9556532c7391a2acb77ab0f7d7b36e1dc382b24 Revert "[mlir][sparse] introduce sparse_tensor.iterate operation" (#88953)
8debcf03c535e14ee47b14fddfcaeae3f32d1317 [mlir][sparse] introduce sparse_tensor.iterate operation (#88807)
002297bdaa63f3f9f56b0051110ccf48f31c6825 [gn] port 22629bb22a1b
8e0a4a89f940d17b520bbca040981f54195d3ea4 [libc++][doc] Documents -DLIBCXX_INSTALL_MODULES=ON. (#88547)
388da6a31b7ba3062f9306b894656e265b9b33eb [libc++][test] Removes Clang 16 validation. (#88558)
41a830500aa5556a65198607ec751d8e3254c949 [libc++] Removes deprecated LIBCPP_ENABLE<VERSION>_REMOVED_FEATURES macros (#88548)
9cd3e92f05fcc2c9168a7abc56d08f0d33bfdfdf [libc++][modules] Removes some validation quirks. (#88031)
a75c9d059791f5d175f6c263d114d59e51b46120 [NFC][libc++] Moves ios_base's forward declaration. (#88027)
5462b27026dee886fb896980d6ad9487200a6cbe [NFC][libc++][TZDB] Refactors argument order. (#85781)
1c2afbae9af22b58190c10e3517242d01d89d612 [CodeGen,test] Test llvm-libc style alias attribute with UsingShadowDecl
6b83fe552990966fdad0e5693a79b02b87d9526e [RISCV] Strength reduce mul by 2^n + 2/4/8 + 1 (#88911)

Update diff April 23rd 2024, 4:45:54 pm

from: llvm/llvm-project@c108653
to: llvm/llvm-project@df60805
commit: 40501f8

Change Logs

from c1086532d4d5c0a261457dfb00e79fcb764e3d78 to df608051234c256f1dc2c89f30afd034706c2c2e

df608051234c256f1dc2c89f30afd034706c2c2e [NVPTX] Improve support for rsqrt.approx (#89417)
f426be195a08874686d01783bbc490295bf4afb2 Revert "[mlir][linalg] Add runtime verification for linalg ops" (#89780)
c793f4a4dab058cee4f283100946a1bb8e465f59 [RISCV] Add test coverage for mul (zext), 2^N + 2/4/8 [nfc]
03c8a29d1061c9dd47953c21aae70f46075f1b0c [X86] pr34592.ll - add O3 codegen run for comparison
ed255ed20b730160f8aec54e0acdbb40e3bc7fcf [X86] pr34592.ll - add nounwind to remove cfi noise
e0c28485ad195f1650b6826ab2d856e7917788e2 [mlir] Update comment about propertiesAttr (NFC) (#89634)
03760ad09d49f74c026f0b5d41d982cad81c67d7 Reapply "[RISCV] Implement RISCVISD::SHL_ADD and move patterns into combine (#89263)"
1d7086e475c76046b58f4e1c5568720f1c67ad55 clang/win: Add a flag to disable default-linking of compiler-rt libraries (#89642)
8317d366212763d907d6d61a6d07450168a33bfb [mlir][linalg] Add runtime verification for linalg ops (#89342)

Update diff April 19th 2024, 1:27:27 pm

from: llvm/llvm-project@bd898d5
to: llvm/llvm-project@0a8cd1e
commit: bb143a7

Change Logs

from bd898d5e111e33a7f614f6b6c34940d81be6682c to 0a8cd1ed1f4f35905df318015b0dbcb69d81d7c2

0a8cd1ed1f4f35905df318015b0dbcb69d81d7c2 [OpenMP] Use half of available logical processors for collapse tests (#88319)
aa39b0b13e3b56ac072acff2660dbef9db45bca0 [AIX][Debug]correct the cases on AIX bot, NFC
2e68ba99def5b07f4c6c53627baf076c5c924979 [DAG] visitADDLike - update "(x - y) + -1 -> add (xor y, -1), x" fold to accept UNDEF in a splat vector of -1
7fbdadb68e259079d23165ecb94e2893a3823576 [AArch64][X86] xor.ll - fix vec_add_of_not_with_undef_decrement copy+pasta typo
ae9a5b07e0dca10cd44a11f11915be5eab002307 [SystemZ] Add TPEI instruction and Associated Facility (#89372)
0a5f50d50be429734074584702cd20cf54c27420 [KnownBits] Simplify optimality checking in unit tests. NFC. (#89368)
e2f1cbae45f81f3cd9a4d3c2bcf69a094eb060fa [analyzer] Use explicit call description mode (easy cases) (#88879)
5af9701985c6abba328dbedbd2d9c602dc46c4b0 [SystemZ] Fix Operand Retrieval for Vector Reduction Intrinsic in shouldExpandReduction (#88874)
e7c042f12fd6f3bbbbe9aeb37854d499aada8457 [lldb] Make SBType::FindDirectNestedType work with expression ASTs (#89183)
7e2c2981fbb9e609886cfbe6c95644ed58b03d08 [SystemZ][z/OS] Implement llvm.frameaddr for XPLINK (#89284)
090d03d1c7eef4f9790b9300f19176e8f49151dd [MLIR][LLVM] Add flag to skip import of DICompositeType's elems (#89355)
b3c72bcbf2eb7963ef0ac3da519107aba151f77f [Flang][OpenMP] Issue error if reduction clause has proc-pointer (#88999)
df411fbac60825d07090ce17391db7606d8400f1 [MLIR][DataLayout] Add support for scalable vectors (#89349)
4d7f3d9e0fb8cf9a4db6aa73c4fcb21bae98ef3a [SLP]Fix final analysis for unsigned nodes.
6f26867cfa4c1333e69a17f8a2fc8297a4ab6d45 [AArch64][SVE2] Generate SVE2 BSL instruction in LLVM for add/sub. (#88413)
054b1b3b5ac67385220654df12732346b51c8a41 Revert "[SLP]Fix final analysis for unsigned nodes."
2512ce3df51ef57d9e7134bc187c5cd41f2cd10c [IR] Add support for trunc's nuw/nsw flags in copyIRFlags (#89353)
494c637816e4787752ae3bf29be618ffdc92f4cd MachineInstrBundle: modernize a couple of loops (NFC) (#89229)
7c7704c946ab6078c42b24a57eb537944861cba1 [AMDGPU] Allow any linkage for dynlds (#84742)
95ffa8a2ac1154d968c0af2d428ade541eddd828 [mlir][emitc] Restrict types in EmitC (#88391)
e2a72fa583d9ccec7e996e15ea86f0ceddbfe63c [VPlan] Introduce recipes for VP loads and stores. (#87816)
851462fcaa7f6e3301865de84f98be7e872e64b6 [AArch64] Remove invalid uabdl patterns. (#89272)
aac695da42cf48ccb29c2fe495ead564cc913471 [NFC] [Serialization] Use semantical type 'DeclID' for 'CreateDeserialized'
14122106320b88f114301bbf8694ceac9bb7a27a [clang][dataflow][NFC] Fix code formatting in DataflowEnvironment.cpp (#89352)
14193f4320e26b75dc592abf952af1c63760665c [SPIR-V] SPIR-V Backend must generate a valid OCL version if working in OpenCL environment (#89199)
e8fce95887ecfd87a83db8dbb0cc55966b004d6f [clang][nullability] Remove RecordValue. (#89052)
b2323f43e3cdb52b4e15a7d4f434cd5c64740dd4 [AIX][Debug] generate an error instead of crash in backend for -gdwarf-5
ca7d9442baf638f020c9594dc2af388d24c4a3e1 [clang][dataflow] Support CXXParenListInitExpr in PropagateResultObject(). (#89235)
affcaf622d8e900abab1d39d41d9f2d335f32614 [test][AArch64][CodeGen] Delete redundant check lines in tiny-model-pic.ll (#89243)
8363ff6a2e9d20258fb72e4db64ffb6e4167618f specify openmp lib in aix-toolchain-include.cpp test
20667dbec30354723d6467b833a081db998eb70a [clang][CodeGen] Fix shift-exponent ubsan check for signed _BitInt (#88004)

Update diff May 10th 2024, 6:51:35 am

from: llvm/llvm-project@87f3407
to: llvm/llvm-project@0ebe48f
commit: 73d10f4

Change Logs

from 87f3407856e61a73798af4e41b28bc33b5bf4ce6 to 0ebe48f068c0ca69f76ed68b621c9294acd75f76

0ebe48f068c0ca69f76ed68b621c9294acd75f76 [RISCV] Move RISCVInsertVSETVLI after CSR/VXRM passes (#91701)
e7e13c6ffec58fe67a23d173387e96d5ebb8f84b [ORC] Fix another error fall-through in EPCGenericDylibManager::lookupAsync.
135d92f903161e66ff82ab846acfbc5015ef3096 [Driver] Use StringRef::operator== instead of StringRef::equals (NFC) (#91698)
06ad86361ab29d344a5e2e22903c2739743c77be [NFC] Prefer str.resize(len) over str.substr(0, len) (#91067)

Update diff June 12th 2024, 1:51:24 pm

from: llvm/llvm-project@74f200b
to: llvm/llvm-project@47afa10
commit: 97ad8e7

Change Logs

from 74f200baedfed496880ca86ce9409788b0d0eaca to 47afa10bbaa89351afa9bcc53dd959e6181ebf3d

47afa10bbaa89351afa9bcc53dd959e6181ebf3d [libc++][z/OS] Disable portion of formatter.char.funsigned-char.pass.cpp for no unicode (#94044)
04c4cf45faea421a20ca7a3a01c1cdbca4f45910 Revert "[NFC][AMDGPU] Do not flush after printing every instruction (#95237)"
d3342e5b922209e471b610ca1e254d9481b65319 [SystemZ][z/OS] Continue marking text files with OF_Text (#95111)
ea2ee5dc2f14a17ff4486b41c9475c0b261412a4 [DAG] Add legalization handling for AVGCEIL/AVGFLOOR nodes (#92096)
ec16f44d0899e1b9c26b27d942f6e2928d3da7e4 [InstCombine] Use named values in comment (NFC)
ad9fe3b2a949fb3379e0a1bafbcd2ca81f5fa414 [NFC][AMDGPU] Do not flush after printing every instruction (#95237)

Update diff April 22nd 2024, 7:27:37 pm

from: llvm/llvm-project@9c9dea9
to: llvm/llvm-project@6b1b4c1
commit: ba89bd3

Change Logs

from 9c9dea943706340f8a45dc74887bf9beddd67810 to 6b1b4c1c54d4276409c336eaf6d47b3bc04035c3

6b1b4c1c54d4276409c336eaf6d47b3bc04035c3 [RISCV][clang] Don't enable -mrelax-all for -O0 on RISC-V (#88538)
dd7963239e94bcd46e56ae90b08d2d0c9904ff00 [libc][POSIX][pthreads] implement pthread_rwlockattr_t functions (#89322)
0336116ed463c2ad125793a5aa4d7290a2155709 [libc][docs] codify Policy on Assembler Sources (#88185)
a54102a093190f3a29add5d9327e62f13fce896a [llvm] Add support for zero-width integers in MathExtras.h (#87193)
43c26bbc425dbd8caee311a0d5e4d90c8e71d0d8 [libc] don't over include stdlib in the hdr declaring bsearch (#89471)
ca1f1c957232b05d6529916bcd769ae1c57ff935 [BitInt] Expose a _BitInt literal suffix in C++ (#86586)
9a3595167d3ee875e3180800cec5f5c3fd170e63 [RISCV] Add freeze when expanding mul by constant to two or more uses (#89290)
2834e8ad1cfe32b69a8b5a1dd2477725683a61c4 [lldb][NFC] Remove unused pexpect/ptyprocess (#89609)
758d97dce0c669a0ba6927728b40030a76acb144 [MIPS]: Rework atomic max/min expand for subword (#89575)
f94ed6f7977305db8fa6b48a85c9db2b8cc4d3b3 [clang-tidy] Improved --verify-config when using literal style in config file (#85591)

Update diff May 28th 2024, 10:49:18 pm

from: llvm/llvm-project@df542e1
to: llvm/llvm-project@6aeea70
commit: 1298620

Change Logs

from df542e1ed82bd4e5a9e345d3a3ae63a76893a0cf to 6aeea700df6f3f8db9e6a79be4aa593c6fcc7d18

6aeea700df6f3f8db9e6a79be4aa593c6fcc7d18 [mlir][dataflow] Fix for integer range analysis propagation bug (#93199)
b9cdea66b62e2eb91814ef7c57ea01aa27440e72 Attempt to fix issue with plus sign in libc++ workflow name
067b4ccb4b5ab93ac2dc2243248a8934fa1f7ce3 Upstream libc++ buildbot restarter. (#93582)
765206e050453018e861637a08a4520f29238074 [CodeGen] Hidden visibility for prof version var (#93496)
2d00c6fe06b6d709b4ab3d6b253df304c04e0c1f [RISCV] Add a rematerializable pseudo instruction for LUI+ADDI for global addresses. (#93352)
00bd2fa1982f3114536323209fffad909463effc [flang][cuda] Add bind c to cudadevice procedures (#92822)
060b3023e198d197b47c652f19af5f7dea3a22cc [RISCV] Move TRUNCATE_VECTOR_VL combine into a helper function. NFC (#93574)
e3f74d4589e29279e9f543b58577a2ece102dc6f [OpenACC] Correct serialization of certain clause sub-expressions
ed4227aad37f2c4adf307b63050fb9aee52b07f8 [SCEV] Add tests for symbolic max BTC requiring predicates.

Update diff May 21st 2024, 11:31:42 pm

from: llvm/llvm-project@0012b1e
to: llvm/llvm-project@219ea26
commit: 5d42b43

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Change Logs

from 0012b1ea84e671a9e0c9f7f2d1564315ed9cbcca to 219ea26733f96e0c63796bed8e507f7bb1a02140

219ea26733f96e0c63796bed8e507f7bb1a02140 [BOLT][NFC] Remove dead initialization code (#92952)
e42b799bb28815431f2c5a95f7e13fde3f1b36a1 [clang] NFCI: use TemplateArgumentLoc for type-param DefaultArgument (#92854)
b90861498b5b5c06ba24a122b6987738560acf99 [BOLT][NFC] Use const reference in range-based for loop (#92932)
a5bab70d0667d3bd709720c5c78870b8ad280545 [libc] Fix scudo integration test (#92967)
42ba740afffa16f991be6aa36626bd872d41ebc0 [libc++] Implement C++20 atomic_ref (#76647)
2e7365eabe4dd2a56b0b1b4053a95558c4f4bb97 [lldb] Set ObjectFile's assignment operator to also be deleted like its copy constructor (#92942)
5442e15a152614628e2e2bef250c91eacf75fc9c [libc][__support] move CndVar to __support (#89329)
b3e71ec9f7efe15f7fd3dd4fc398860e1e857c11 [libc] Provide _libc{init,fini}_array for baremetal (#90828)
f6ff87dd90074b694e420d93389c749189bca0ec [libunwind][WebAssembly] Make libunwind compilable (#92192)

Update diff April 23rd 2024, 2:00:25 am

from: llvm/llvm-project@28cea99
to: llvm/llvm-project@e7efd37
commit: d8799d4

Change Logs

from 28cea99845601cad840ccda23a8415f83e5a2b8c to e7efd37c2296f329fb0fd687dd0cfb846d47480f

e7efd37c2296f329fb0fd687dd0cfb846d47480f Revert "Re-apply [ORC] Unify task dispatch across ExecutionSession and..."
aa89c1bd78a0c49801193bec5e7f5c023448bd19 [lldb][DAP] Fix test failure from #73393 (#89692)
16efd2a4c4b6a811688e5f623cb04dbd2d0579e8 [AIX][TLS][clang] Add -maix-small-local-dynamic-tls clang option (#88829)
1effa19de2493b835f3b74dd92e77c8b199069a5 Re-apply "[ORC] Unify task dispatch across ExecutionSession and..." with fix.
dc3f94384d79941a712b15ac5c53bf86daa860c8 Revert "[RISCV] Implement RISCVISD::SHL_ADD and move patterns into combine (#89263)"
30d4f6afc9d594fff309121116d8373b66fb1a24 Make createReadOrMaskedRead and isValidMaskedInputVector vector utilities (#89119)

Update diff April 25th 2024, 7:50:06 pm

from: llvm/llvm-project@0b01b21
to: llvm/llvm-project@8dcb90b
commit: 488cbee

Change Logs

from 0b01b2143735a0becf2ed09825ddd33b98b1c5b5 to 8dcb90b083f1dd681478c5d036e52785bafcc205

8dcb90b083f1dd681478c5d036e52785bafcc205 Revert "[Flang] Add fallthrough annotations in visit.h (#90014)"
6dd2617c80d5133b92fdff679364f2d8fcd93b47 [Clang][Sema] Fix warnings after #84050 (#90104)
cb9589b2273e99d9c9a64c97416696a1690932a8 [memprof] Move getFullSchema and getHotColdSchema outside PortableMemInfoBlock (#90103)
f72611b40de8c060c3901dab0ee9f8424dd3012b [RISCV][NFC] Trim line to 80 chars in RISCVInstrZvk.td
2e77aea22f11d0acf13b32fec0df81351a1e236a [RISCV] Give up on correct undef semantics in mul strength reduction (#90097)
3dcd2cca7777b338d87deb1ca506df1376123667 Fix Objective-C++ Sret of non-trivial data types on Windows ARM64 (#88671)
a8fd0d029dca7d17eee72d0445223c2fe1ee7758 [Clang][Sema] Diagnose class member access expressions naming non-existent members of the current instantiation prior to instantiation in the absence of dependent base classes (#84050)
2f2e31c3c980407b2660b4f5d10e7cdb3fa79138 Initial step in targets DAP support (#86623)
02660e274242b2dd61543a06d7ab4dc0efd2517d [NFC] Enable atomic tests on AIX

Update diff May 8th 2024, 9:55:18 pm

from: llvm/llvm-project@b52160d
to: llvm/llvm-project@fcf945f
commit: 61997cd

Change Logs

from b52160dbae268cc87cb8f6cdf75553ca095e26a9 to fcf945f4edbad1f2d82df067c2826baa6165dd3e

fcf945f4edbad1f2d82df067c2826baa6165dd3e [DAG] Fold add(mul(add(A, CA), CM), CB) -> add(mul(A, CM), CM*CA+CB) (#90860)
965f3ca3dc5464892e283e176bf058ae04d8b654 [GISel] Fold bitreverse(shl/srl(bitreverse(x),y)) -> srl/shl(x,y) (#91355)
cec6665f2b7583223eb20519dfc3289011d1d2d7 [MemProf] Optionally update hints on existing hot/cold new calls (#91047)

Update diff June 5th 2024, 10:51:20 am

from: llvm/llvm-project@7eaae4e
to: llvm/llvm-project@2c31bc7
commit: daa9ae6

Change Logs

from 7eaae4e6afb6a434cc9fd6065dfa347ab6c1c2bb to 2c31bc7c0455e2167dcaef6b284cb0574406fc72

2c31bc7c0455e2167dcaef6b284cb0574406fc72 [flang][Semantics][OpenMP] Fix ICE for unknown reduction starting with . (#94398)
05e1b5340b0caf19ef2f8323b84082c389850720 [VPlan] Model FOR resume value extraction in VPlan. (#93396)
e635520be888335dd59874038d33e60cca3a7143 [DAG] computeKnownBits - abs(x) will be zero in the upper bits if x is sign-extended (#94382)
043cc5a2275d014766dd4ec2ad4fe07d5516ceef [AArch64][compiler-rt] Add a function returning the current vector length (#92921)
42ebf3eaafc2a5c3c9338020186c0ad44cc4edf7 [utils][filecheck-lint]: speedup filecheck_lint (#94191)

Update diff May 21st 2024, 6:50:20 am

from: llvm/llvm-project@ac7c482
to: llvm/llvm-project@6246b49
commit: 9657279

Change Logs

from ac7c482ca581cdab11558b5a37ae5095a1638fd2 to 6246b495adcbdff7d2ec4f37dfb656542adf909d

6246b495adcbdff7d2ec4f37dfb656542adf909d [RISCV] Select ISD::AVGCEILS/AVGFLOORS as vaadd. (#92839)
50dbbe5a0afd76f3c26c03da5af65e7263ac8664 [SROA] Use stable sort for slices to avoid non-determinism (#91609)
e3ffc4b6d4df3970dd10e65dcafd6f2d31deefd8 [RISCV] Unify getDemanded between forward and backwards passes in RISCVInsertVSETVLI (#92860)
66b76faffb211b3cb2d58e3ab9401e6396447de9 AMDGPU: Directly emit sqrt intrinsic when folding rootn(x, 2) (#92598)
e411c88b7223d87520af819fdc012c9dbb46e575 Use StringRef::find_first_of(char), etc (NFC) (#92841)
312c132467717461f3b00eccddbd615aa6aa483b [mlir][Bazel] Adjust BUILD file for 33b7833891dcacf9e81e911ed59932fd55113fff

Update diff April 24th 2024, 5:50:49 pm

from: llvm/llvm-project@80f510b
to: llvm/llvm-project@fd92735
commit: 8ac5c43

Change Logs

from 80f510bbc9561324fc13bac22aad2e3ef47a59c5 to fd9273593390c4e5004bba27eeeea60e44175dcf

fd9273593390c4e5004bba27eeeea60e44175dcf [MLIR][Doc] Fix NamedAttribute API in code sample (NFC)
a45eb628779562fac72366f594fbcdc5607b4f8d AtomicExpand: Fix dropping a syncscope when bitcasting atomicrmw
8350d9c23d76fb95f42674a1563cbe8c32582dd5 [RISCV] Sync RISCVFeatures.td implies list with RISCVISAInfo.cpp.
286bd42a7a799e3d9035c09bf0d64cb1a1eef682 [mlir] Extract forall_to_for logic into reusable function and add pass (#89636)
af82d01fbbce7808605f3a8b22dd1ca7fdec7886 Reapply "[RISCV] Separate doLocalPostpass into new pass and move to post vector regalloc (#88295)"

Update diff May 31st 2024, 2:47:08 pm

from: llvm/llvm-project@6ee845d
to: llvm/llvm-project@edf4e02
commit: ccb28f1

Change Logs

from 6ee845d2401b7f0e5f385fc0e3a8cb44afd667dc to edf4e02906bd0c57087a44e5c4890ffc453667b2

edf4e02906bd0c57087a44e5c4890ffc453667b2 [RISCV] Support multiple levels of truncates in combineTruncToVnclip. (#93752)
5c7f7cc4dea3e202b56cebaa303d7fb8b26fc18e [flang] Fix exec.f90 test on LIT integrated shell (#93961)
b52962d1b89ca9102a89497743b7576d572b437e [X86] LowerVSELECT - split v16i16/v32i8 pre-AVX2 VSELECT ops if enough of the operands are free to split.
654cd946296586e00c8d2f203a137b6a6b0d8be7 [VPlan] Unconditionally run optimizeForVFAndUF.

Update diff April 19th 2024, 7:33:25 am

from: llvm/llvm-project@bd898d5
to: llvm/llvm-project@ca7d944
commit: a2263da

Change Logs

from bd898d5e111e33a7f614f6b6c34940d81be6682c to ca7d9442baf638f020c9594dc2af388d24c4a3e1

ca7d9442baf638f020c9594dc2af388d24c4a3e1 [clang][dataflow] Support CXXParenListInitExpr in PropagateResultObject(). (#89235)
affcaf622d8e900abab1d39d41d9f2d335f32614 [test][AArch64][CodeGen] Delete redundant check lines in tiny-model-pic.ll (#89243)
8363ff6a2e9d20258fb72e4db64ffb6e4167618f specify openmp lib in aix-toolchain-include.cpp test
20667dbec30354723d6467b833a081db998eb70a [clang][CodeGen] Fix shift-exponent ubsan check for signed _BitInt (#88004)

Update diff May 29th 2024, 10:56:51 am

from: llvm/llvm-project@a72a906
to: llvm/llvm-project@23a09b9
commit: d9af89d

Change Logs

from a72a90677d2b320e3bca553698e99143034387d9 to 23a09b99313edb67d267a974be6cebfdfd97c7c8

23a09b99313edb67d267a974be6cebfdfd97c7c8 [lldb][Test] Remove some xfails for AArch64 Linux
9e8ecce88ef65a2953db8071746720dd78bd1632 [DAGCombine] Transform shl X, cttz(Y) to mul (Y &amp; -Y), X if cttz is unsupported (#85066)
aef0bdd36d888edd1575713e4976162daf81ff5b DAG: Preserve flags when expanding fminimum/fmaximum (#93550)
6543453c3604c5532666a9bad2bf3d261099dab5 [AArch64][NFC] Pre-commit test update for Select TBL/TBX instructions (#92914)
718ba5a58452f013f40fab94f967064919bf13ff Reapply [InstCombine] lshr (mul (X, 2^N + 1)), N -> add (X, lshr(X, N)) (#92907)
3bcccb6af685c3132a9ee578b9e11b2503c35a5c [Reassociate] Drop weight reduction to fix issue 91417 (#91469)
971f1aaad3ca3680bfbab76212f498ca15b280a2 [lldb][Test][Windows] Fix flaky address range API tests
5c214eb0c628c874f2c9496e663be4067e64442a [Inline] Clone return range attribute on the callsite into inlined call (#92666)
e1aa8ad6faa1524f12338ca58d1eadfde6f29f34 [flang][OpenMP] Fix bug in emitting dealloc logic (#93641)
78cc9cbba23fd1783a9b233ae745f126ece56cc7 [AArch64][SME] Add intrinsics for multi-vector BFCLAMP (#93532)
5553f27d5a45e702415fa2f91d842bf4a1f4a8b5 [AMDGPU][test] Fix the wrong triples in lower-work-group-id-intrinsics-{hsa,pal}.ll. NFC (#93501)
1594cebedd60a08f408e3fa975116ef4db86bf9b [mlir][EmitC] Fix evaluation order of expressions (#93549)
dc8da7ddeaa595a34827fc9e39322a8109e177f0 [AMDGPU] Reserved private memory register during PEI (#93536)
74014b5a3497c1e9c7f0652d26f78fffea9bf51c Fix typo in AMDGPUUsage. NFC (#93652)
f42de69213890f1203c1c3418a962e50de4ed73c [X86] vector-shuffle-512-v16.ll - add fast shuffle test coverage
9c42ed1371ee8c211aedcfe8aed16662a9befb69 [X86] Add x86-atomic-double.c double test coverage
4bb6974a87e495f19faea4b13475a65e842473f0 [X86] x86-atomic-long_double.c - cleanup check prefixes
f3fb7f569936db418feef98e4ae68777a9a4cd2a [X86] x86-atomic-float.c - cleanup unused check prefixes
0f7b4b04a548e10d0f552f13bebc21972d55d7f6 [X86][Driver] Enable feature ccmp,nf for -mapxf

Update diff May 14th 2024, 6:48:39 pm

from: llvm/llvm-project@86f655c
to: llvm/llvm-project@19008d3
commit: a70bc16

Change Logs

from 86f655cb4e2f4134d48219a2959a10c90e3396cb to 19008d32182ebbe421aaa222ee8af5c3e134e550

19008d32182ebbe421aaa222ee8af5c3e134e550 [llvm] Support fixed point multiplication on AArch64 (#84237)
f89b1b8a68065c4b880417abb0563bce21399b52 [mlir][bazel] Fix bazel build.
67d840b60fbd75ca1b52d77bd3353771ec853735 [VPlan] Relax over-aggressive assertion in VPTransformState::get().
90109d444839683b09f0aafdc50b749cb4b3203b [RISCV] Improve constant materialisation for stores of i8 negative constants (#92131)
de14b749fee41d4ded711e771e43043ae3100cb3 [RISCV][test] Precommit tests for byte store of -1
39d123f58a0e3c5f1a928940244b8dfd827fd4e5 [nfc] const-ify IntOrString::equalsLower (#92152)

Update diff April 22nd 2024, 9:35:46 pm

from: llvm/llvm-project@bcd150d
to: llvm/llvm-project@14e6f63
commit: c84911c

Change Logs

from bcd150d2906ac83ea0ab680e981770a71c021a03 to 14e6f63ee64711bbd74a0fda745f62f62556d70d

14e6f63ee64711bbd74a0fda745f62f62556d70d [Frontend][OpenMP] Add suggested brackets in array initialization
e95e94adc6bb748de015ac3053e7f0786b65f351 [mlir][test] Reorganize the test dialect (#89424)
5a7c80ca58c628fab80aa4f95bb6d18598c70c80 [RISCV] Implement RISCVISD::SHL_ADD and move patterns into combine (#89263)
b8ff08d0e668e5397dd799b76ede0bd54fcba75c [Frontend][OpenMP] Add missing "return" statement after 40137ff0d81be
a3e7a125e11872b97a84bf7766ce05ccc100e896 Reapply "[compiler-rt][ctx_instr] Add ctx_profile component" (#89625)
8482dbdcd208ebccafd848d35550aa8a484e445e compiler-rt: fix few builtins build warnings. (#88991)
83bc7b57714dc2f6b33c188f2b95a0025468ba51 [libc++] Remove _LIBCPP_DISABLE_NODISCARD_EXTENSIONS and refactor the tests (#87094)
7c5854673391940d578c591c727614bf50b78301 [nfc][llvm] Fix a typo in MathExtras.h testing (#89653)

Update diff May 2nd 2024, 10:50:46 am

from: llvm/llvm-project@d00ed83
to: llvm/llvm-project@d9fc5ba
commit: acdacb7

Change Logs

from d00ed836e77759414afd40c02eeca5651657438f to d9fc5babb96ca9c75f36f9cf3d3f2a55ddc0ab4d

d9fc5babb96ca9c75f36f9cf3d3f2a55ddc0ab4d DAG: Implement softening for fp atomic store (#90840)
175d2971020ceaad3e1adcf9bb92e4ebaaa449ee [LoopUnroll] Add CSE to remove redundant loads after unrolling. (#83860)
b6328db80b4294cf83a3471ecdfab33003fa742d [clang][CodeGen] Put constant initializer globals into constant addrspace (#90048)
f17b1fb6673e9ed6a7d9180230586113bb99748c [Clang][CodeGen] Optimised LLVM IR for atomic increments/decrements on floats (#89362)
171aeb20ad465a49065730719731aae405c1d167 [DAG] SelectionDAG.computeKnownBits - add NSW/NUW flags support to ISD::SHL handling (#89877)

Update diff April 15th 2024, 3:08:48 pm

from: llvm/llvm-project@f78b346
to: llvm/llvm-project@c3d5886
commit: c6321cf

b55caa398f719f2c.ll fail
d54466b3ed970e20.ll fail

Change Logs

from f78b3466caa9296b32ec235dee87ace2dea94507 to c3d58867bd3da85958dbbb46c4a22c0d3c60af66

c3d58867bd3da85958dbbb46c4a22c0d3c60af66 [AArch64][SME] Create new pass to remove COALESCER_BARRIER early. (#85386)
32cb3c55080eec70abf282fbe75e6a58cf76f92a [NFC][LLVM][CodeGen] Move LiveDebugVariables.h into llvm/include/llvm/CodeGen (#88374)
105dcc882cf0152baeaa02ac0e50e2527b6940db [HLSL][SPIRV] Add any intrinsic lowering (#88325)
67e733d36ef0c5ec9fab899ecf9f191d83c7d418 [BOLT][NFC] Refactor relocation printing (#88180)
17cb8a537b688ac6e4187f28f9e784491bb8abc5 [Flang][OpenMP] Accept the reduction modifier (#86492)
1b310c45e914f0a76fa594bebdff44e7a386d4f9 [RISCV] Split PseudoVFMIN, PseudoVFMAX PseudoVFSGNJ, PseudoVFSGNJN, and PseudoVFSGNJX by SEW
469493f55639a5cce2fc69300222be609fcc5238 [RISCV] Split narrowing convert to FP pseudos by SEW
60a1158f31bb99a5d049d5cac5a704d906a1277e [RISCV] Split Widening convert to FP pseudos by SEW
2e0e3b0f10b5c433504e31ca73e55f86e0b27660 [RISCV] Split single width convert to FP pseudos by SEW
7089c359a3845323f6f30c44a47dd901f2edfe63 [LLVM][SelectionDAG] Allow verification of target ISD nodes. (#88121)
58d4470fa49443da1477a7d2e43685e91bbd6630 [X86] Remove scaleVectorShuffleBlendMask and use APIntOps::ScaleBitMask directly.
7b039c0cf0045d81da7e1575232a46266cff1e88 [DebugInfo][RemoveDIs] Fix error from not tracking seen debug labels (#88718)
673da8c83413c4d1e7e76e1b52a2924e837e7221 [LLVM][CodeGen][AArch64] Remove bogus lowering of sve_while{gt/ge/hi/hs} intrinsics. (#88126)
8095b9ce6bf5831a14c72028920708f38d13d0c3 [clang analysis] ExprMutationAnalyzer avoid infinite recursion for recursive forwarding reference (#87954)
6254b6dd892728306ddfe657f10eb43a3799864d [VPlan] Version VPValue names in VPSlotTracker. (#81411)
d48ebac0389ba75defce5bd83d8539d51008b28d [LLVM][SVE][CodeGen] Fix incorrect isel for signed saturating instructions. (#88136)
9da0ef165efd91b862b8c3cff1604472476839d6 Fix complex tanh overflows. (#88708)
14774ad59da4aaa8eb3da21c8c53b59834a1aeb7 [X86] Remove unused function (NFC)
6acc50ae5b5971af563a0f40b5f0279870171541 Fix typo in computeKnownBits_AVGFLOORU_AVGFLOORS_AVGCEILU_AVGCEILS.

Update diff May 21st 2024, 7:46:43 am

from: llvm/llvm-project@6246b49
to: llvm/llvm-project@d094bb6
commit: 45919c5

Change Logs

from 6246b495adcbdff7d2ec4f37dfb656542adf909d to d094bb660d48fd1beadc0e2456f104ab2cc7f52c

d094bb660d48fd1beadc0e2456f104ab2cc7f52c [InstSimplify] Avoid use of ConstantExpr::getICmp() (NFC)
566431ce087d34eaec390cff13251e743688928f [NFC] Improve the comment about std::min_element being constepxr in libstdc++
e3fa7ee11d88dfaa82bf0c3fc3b69eac6c40a16a VectorCombine: refactor foldShuffleToIdentity (NFC) (#92766)
bfb5fe218ec7aa282375905189bf0aab79609c04 [mlir][ArmSME] Fold transpose into xfer read to enable in-flight transpose (#92562)
63d81311a2569226781dc00481feb91ea1423571 VectorCombine: add tests written for InstSimplify (#92776)
c4d6867b786a0c850de824fe5452acf6c3c676ca InstSimplify: strip bad TODO (NFC) (#92754)
56a1f0a022f6d7f6908af0df9e2e0567d5e4712e Documentation: Fix C++ examples in MemorySSA documentation (#92802)
675e7bd1b94f78f0567b4327f187841c0cde36f9 [RISCV] Support postRA vsetvl insertion pass (#70549)
9c7848171779dffb2e23cc7db6b518612e804a74 [SeparateConstOffsetFromGEP] Support multiple indices in reorderGEP (#92339)
f2e787e7030126f5f55bb4e90cc83827f25e1219 [InstCombine] Add some tests with reduced flag sets, NFC
2631531764f0e732a0e96ab066de27d08b604655 [InstCombine] Removing the combine of fmuladd with fast flag

Update diff May 8th 2024, 6:30:01 pm

from: llvm/llvm-project@11a6799
to: llvm/llvm-project@dabdec1
commit: 6aeb273

Change Logs

from 11a6799740f824282650aa9ec249b55dcf1a8aae to dabdec1001dc368373dd581cf72f37a440873ce3

dabdec1001dc368373dd581cf72f37a440873ce3 Fix memref.expand_shape verifier (#91501)
bb6df0804ba0a0b0581aec4156138f5144dbcee2 [llvm] Use StringRef::operator== instead of StringRef::equals (NFC) (#91441)
46435ac19e09039fb146fa6c12da0e640a66d435 [NFC][BOLT] Remove dead code (SPTAllocatorsId) (#91477)
08011cf8453c7c9e87d135f063356b6764a91cbc [Docs][NFC] Use opaque ptr in the example (#91502)
576838301d23bb779aa9c3f0cc3d086c46add44b [IR] Remove check for bitcast of called function in CallBase::has/getFnAttrOnCalledFunction (#91392)
a620697340671aea2b0c65449fcddf3c2e4d1917 [IR] Check callee param attributes as well in CallBase::getParamAttr() (#91394)
4298fc5eb5c483fb72db6fce062352087dfd0acf [RISCV] Move strength reduction of mul X, 3/5/9*2^N to combine (#89966)
b59461ac63aa1770a617f96bab31010442bd2090 [ADT] Add back ability to compare StringSet (#91374)
3dcbcce287877322b2902ae271642416fdc8481c [clang][CodeGen] Remove now-unused FileManager variable (#91495)
8d9b15497d70ac782d7d01a2d606f9fec7e7f642 Fix unused private field warning (#91500)
efad14954c9d5bdfaddaca948be6cd7e71a1d1b0 [Support] Add end/error to decode[US]LEB128AndInc
6d8901488f160dd92aea5b98fcc21c7fa7c1cbe6 [DXIL] Set DXIL Version in DXIL target triple based on shader model version (#91407)
5636eb89bd69f9c55f4e4aeafaa8c04aa99e5c84 [X86] combineBlendOfPermutes - allow whole-lane permutation on AVX1 targets.
a6171900a446c85c3b53a4a9deba16b746f9f77f [RemoveDIs] Change remapDbgVariableRecord to remapDbgRecord (#91456)
2ceb1291ef3ddb87cb58030cd61d965f4030338f [X86] Add canScaleShuffleElements helper. NFC.
9263318f9da22e6632f1aae3e85717ed88fde64f Revise the modules document for clarity (#90237)
29b7eb8400f48fe7d8de3cb3741584c329ec597c [llvm][stackmaps] Include pristine registers for liveness computation. (#90529)
a55127281b2ed5f24f848b9e5c70870ad170bc3f [CostModel][X86] getGSVectorCost - add cost kind support

Update diff April 29th 2024, 9:51:36 am

from: llvm/llvm-project@a19a411
to: llvm/llvm-project@d30f6bc
commit: 1a0a869

Change Logs

from a19a4113df3e9a3ca3747075da6de21901796524 to d30f6bc5cd9579204864c944f127011be70b2c74

d30f6bc5cd9579204864c944f127011be70b2c74 [libc++][NFC] Refactor __libcpp_datasizeof to be a variable template (#87769)
bfc0317153dca75137fba00b5c28758d6f720963 Move several vector intrinsics out of experimental namespace (#88748)
16bd10a38730fed27a3bf111076b8ef7a7e7b3ee Revert "[SelectionDAG] Handle more opcodes in canCreateUndefOrPoison (#84921)" and more...
f029da5cfce66e2d460d5f54b17582810a9111ad [flang] Improve debug info for functions. (#90083)

Update diff May 13th 2024, 5:51:18 pm

from: llvm/llvm-project@1066eb5
to: llvm/llvm-project@8ef2011
commit: 5bbdf8a

Change Logs

from 1066eb55477044a3a92f3a40471375194dfcdbc8 to 8ef2011b2cd3a8fc2ef8d6ea0facb1a39a0dd621

8ef2011b2cd3a8fc2ef8d6ea0facb1a39a0dd621 Reapply "[OpenACC] device_type clause Sema for Compute constructs"
b8f802f783db481ecfd953c9abe74212a8348aff [clang] Allow pack expansions when partial ordering against template template parameters (#91833)
0f7906645d18a38a6b80a1e8e1d425396f6ab353 [mlir][intrange] Fix arith.shl inference in case of overflow (#91737)
cf40c93b5be5cd0011ebbf3a9eead224f7b7079a [mlir][vector] Add Vector-dialect interleave-to-shuffle pattern, enable in VectorToSPIRV (#91800)
ad727b1a6757c4c23b4121192b121fd67219820e Revert "Support polynomial attributes with floating point coefficients (#91137)" (#92001)
2a114d171d4c1e6c742d039a289bf509b86668ac [clang-tidy] Ignore if consteval in else-after-return (#91588)
37ffbbb19576a884c5bb93b9ac0ae97f89523b6b [mlir][tensor][sparse] don't drop encoding when infer result type (#91817)
6140b5bae475069f958f90a81fb9d69c969daab6 [RISCV] Use RISCVISD::SHL_ADD in transformAddShlImm (#89832)
91a14dbf825b79ff143d1b16124763a4a80facab Support polynomial attributes with floating point coefficients (#91137)
79643565a890d29560782fea23877ae61ea5b987 [LoopUnroll] Remove redundant debug instructions after blocks have been merged (#91246)

Update diff April 18th 2024, 1:44:49 pm

from: llvm/llvm-project@3e64f8a
to: llvm/llvm-project@6d9ee88
commit: f37245f

Change Logs

from 3e64f8a4e74cdcaf5920879c86e7e0a827f6ec13 to 6d9ee88599f551be91938ed77fe66d2d6b01b550

6d9ee88599f551be91938ed77fe66d2d6b01b550 [flang] Rename AddDebugFoundation to AddDebugInfo (NFC) (#89191)
e06fb82b40a42eaa6ed6c21b7dbe0fa4bd2443dc [github] notify me about mlir python changes
73b255c9f824157064212d341a255a962e746fd4 [DAG] Ensure extract_subvector(insert_subvector(x,y,c1),c2) --> extract_subvector(y,c2-c1) is working on fixed vector types
a66c09a96dec633c1172a02818859f71fbff4f45 [gn build] Port 0e08bce142c9
97c60d61d043e21da454226619a98bfb2f2194ee [MLIR][OpenMP] Check that omp.loop_nest represents at least one loop (#89082)
af7a82fdc717c9cbd1b77ff4168292098a1f6e8a [NFC] Format code of parseArch() (#89152)
0e08bce142c90fcdc36365433e02d75acadbaa3c [libc++][pstl] Move the CPU algorithm implementations to __pstl (#89109)
3f0d52b2dbdb096212e8ffa6ad86aacd0d256957 [mlir][llvm] Clean out f8 types from compatible types list
652ae4ecadaa972d70ef5cea3b68f2ff103c4af2 [Clang][Sema] Warn when 'exclude_from_explicit_instantiation' attribute is used on local classes and members thereof (#88777)
2a4e61b342e7a19bcb229ef16dee083c58224a3f [mlir][NFC] Move and improve ownership-based buffer dellocation docs (#89196)
9462abdff1687c1e35574cdef8de6c549addc42a [SLP]Fix PR89187: fixx assertion check.
c26e9bf8fafea656b64d811c01fc3a5f970829ef Revert "Constant Fold Logf128 calls (#84501)"
ac39fa740b067f6197dca1caecc97c0da91ebf3d [MLIR][Mem2Reg][LLVM] Enhance partial load support (#89094)
8d6a9c05f6d676c93c84ebf06cf6263657e74c00 [DWARF] Add support for DW_TAG_template_alias for template aliases (#88943)
3da065896b1b59fd8291958e8d13f4a942d51214 Revert "CompilerRT: Normalize COMPILER_RT_DEFAULT_TARGET_TRIPLE (#88835)"
d17db6066d2524856fab493dd894f8396e896bc7 [LLD] [COFF] Don't create pseudo relocations for discardable sections (#89043)
750de326ef0408df4a5f91773c355ded1a1b1b77 [COFF] Rename the COFFShortExport::AliasTarget field. NFC. (#89039)

Update diff May 29th 2024, 9:32:58 pm

from: llvm/llvm-project@0d37e5c
to: llvm/llvm-project@c6c08ee
commit: b318023

69a10674710888e0.ll crash
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Change Logs

from 0d37e5c61797d6075f02daf28d1b16561299bc69 to c6c08eee37bada190bd1aa4593c88a5e2c8cdaac

c6c08eee37bada190bd1aa4593c88a5e2c8cdaac [lldb] Remove setupterm workaround on macOS (#93714)
1880a7bf18f8bf6497eddeda5cea49b507413f3a [LAA] Move getDependenceDistanceStrideAndSize to MemoryDepChecker (NFC).
bfabc958c7c0d7ddc15f23383d9da836e8c6093f [DebugInfo] Add flag to only emit referenced member functions (#87018)
495bc3cf23dedadd6d633cf9600b7c1f8ac87bb4 [DirectX][DXIL] Design document for TableGen Spec of DXIL Operations (#85170)
6595e7fa1b5588f860aa057aac47c43623169584 Revert "[lldb][lldb-dap] Cleanup breakpoint filters." (#93739)
b74f50a26980233c6bdf3bcacea1473a4a5e0d42 [LAA] Store reference to SymbolicStrides in MemoryDepChecker (NFC).
b98bce50ac545e63494335141ff4cc3e39bcb4af [nfc] clang-format llvm/Bitcode/BitcodeWriter.h

Update diff May 16th 2024, 4:58:10 pm

from: llvm/llvm-project@5ac3435
to: llvm/llvm-project@ce67fcf
commit: 870539f

Change Logs

from 5ac34358181b21135851979c1c949632be5a9d32 to ce67fcf15f4ffac00a715cf724bc72e37f063064

ce67fcf15f4ffac00a715cf724bc72e37f063064 Avoid unevaluated implicit private (#92055)
e8692b88bec1d43325804d75166d9483d6c17fc7 [NewPM] Add pass options for InternalizePass to preserve GVs (reland) (#92383)
b82fd5d75cff87f7480a24d4a16ea8400cc35c86 [GlobalISel] Initialize variables in IndexedLoadStoreMatchInfo
b28766eb3f20354d1d7a34ea83b9d915c3715032 [Arm64EC] Correctly handle sret in entry thunks. (#92326)
3abd3d6e597cba5161f37fa0478382fc93a8c9fd [Libomptarget] Remove requires information from plugin (#80345)
117d755b1b84c7d379ea5c3d93f8c2ab9bfcde82 [DAG] SimplifyDemandedBits - use ComputeKnownBits instead of getValidShiftAmountConstant to check for constant shift amounts. (#92412)
309a881dccb82bf1f101cf138bee3e7400968ed8 [VPlan] Address remaining comments for #85689.
cdb41e416adcd49a783f0d3d28d1e3fafb6f5429 PlaceSafepoints: Fix using default constructed TargetLibraryInfo (#92411)
ee407e17a3a4986bab49272665abc9973d78691d [flang] AliasAnalysis: More formally define and distinguish between data and non-data (#91020)

Update diff April 16th 2024, 6:30:35 pm

from: llvm/llvm-project@45eabd1
to: llvm/llvm-project@aefff77
commit: 5fd34b3

Change Logs

from 45eabd1362527d1b3a27a90f7479865785b763ee to aefff774a0d6f75565243263555f2513ac3c9fdf

aefff774a0d6f75565243263555f2513ac3c9fdf [clang] Migrate DR tests to static_assert (#88611)
4082a7554521572a65a5a0008c4661a534df659d Improve stack usage to increase recursive initialization depth (#88546)
184ba038ac1d444980b3e554b0057f3f30c516ab [RISCV] Avoid matching 3/5/9 * 2^N as 2^N + 2/4/8 (e.g. 24) (#88937)
75054525ae58f26c86e418382164540760871186 [clang][Interp] Implement VectorSplat casts
8cd8ebe153391993a3668d2ac8d2994d9491f3ef [MLGO] Use double comparison facilities for reg alloc scoring tests (#88862)
8137bd9e03d636a27701a85b6efe899f9571cac5 [memprof] Use CSId to construct MemProfRecord (#88362)
22bba85d82637d0446928ff6ff41f98583f3d3b2 [OpenMP][test][AIX] Make 64 the max number of threads for capacity tests in AIX 32-bit (#88739)
454d4496970f665200b5b300578894d78405b6ca [OpenMP] Use a memory fence before incrementing the dispatch buffer index (#87995)
b566810add5b7c5695bdd2c39710b78af9dc83ba [unused-includes] PCHContainerOperations uses MemoryBufferRef, not MemoryBuffer. NFC. (#88794)
22e6bf77ad8781810fc81fff4c447c03cdf6f419 [unused-includes][Serialization] Remove unused includes. NFC. (#88790)

Update diff April 26th 2024, 1:00:43 am

from: llvm/llvm-project@9221f3a
to: llvm/llvm-project@593f6fd
commit: 812a362

Change Logs

from 9221f3af8f832d990be986c05d964ad37e5a2356 to 593f6fdcb4bb3ff81ba4e6f89d7b16540c4b9eaf

593f6fdcb4bb3ff81ba4e6f89d7b16540c4b9eaf [mlir][tensor] Fix tensor.reshape canonicalization (#90141)
c2170a31ed063d4ec6f44a0fb8d124be92911e8b [Flang] Allow using common::visit with Clang (#90137)
2804a79bf6ceddf9df12f6a09fdbbe39a6d7d650 [RISCV] Add test where we can remove a vsetvli via needVSETVLIPHI. NFC
040df69b10fc173cfc8bee007d7c9bd22f21a06c [RISCV] Use VSETVLIInfo != operator in needVSETVLIPHI. NFC
0c6e1ca1c704a3a0fb53ae54f7e3723736f477c7 Revert "[Clang][Sema] Diagnose class member access expressions naming non-existent members of the current instantiation prior to instantiation in the absence of dependent base classes (#84050)"
45fc0e6b38b62a61b0ddcda2e7fe9b4fee7e3e58 Revert "[Clang][Sema] Fix warnings after #84050 (#90104)"
8feedd5e067a5ea13e36c39dc634da5c34284ddd [mlir][linalg] Fix the semantic use of a flag (#90081)
5350052632fa3362a1ce89821703a96bc0066f26 [RISCV] Move doUnion into DemandedFields. NFC
bb2b04c73332f017955115fedb94790dac3608b9 [lldb] Recognize DW_TAG_LLVM_ptrauth_type as a type qual (#90140)
eb7dc991841489e2f8f18467705944c9136b06d2 [lldb] Add SBValue::GetValueAsAddress API (#90144)
5f67ce5611ba007ed363b6a78b9c4eac85b70837 [RISCV][MachineCombiner] Add reassociation optimizations for RVV instructions (#88307)
733b271db793ce30c504a1b5c4ae7a8775b0a6a2 [llvm][RISCV] Enable trailing fences for seq-cst stores by default (#87376)

Update diff April 15th 2024, 7:30:25 pm

from: llvm/llvm-project@b570eb5
to: llvm/llvm-project@c31a810
commit: df6debc

Change Logs

from b570eb5e99567c92636279d014f376938fe4e79a to c31a8104d1173d79f8b71518829046b441d98d59

c31a8104d1173d79f8b71518829046b441d98d59 [RISCV] Add -mattr=+v to intrinsic-cttz-elts.ll. NFC
f9d761df50d12147fc7caa19927be81816d60e2d [tools] Fix LLVM_USE_SANITIZE_COVERAGE build (#87722)
45339568486cafaa414a1e40d73a251f7d15e284 [mlir] add polynomial dialect in bazel BUILD
75bbf4dd7cfda744d4a2487cfd06a58194d02db3 [libc] Add proxy headers for fenv types. (#88467)
58c5f50f4c73945fdc5440dee2fba03267a460d4 Reapply "[llvm] Teach GlobalDCE about dso_local_equivalent"
3eb097339e5fb78e91182674e891445ebe5a845b [lld/mac] Fix (adorable!) typo to cycle bots
b7b183371b54a2c4b5d2a39c594d3967a7384cb8 [SLP][NFC]Improve perf of BoUpSLP::buildExternalUses function, NFC.
c0b77e0a4a9bb090e5ad3a28adcd0aa98715cfe5 Revert "Reapply "[llvm] Teach whole program devirtualization about relative vtables""
1c5d5478f7f35d7f212fcbf2af042fc3c720e9ed Revert "Reapply "[llvm] Teach GlobalDCE about dso_local_equivalent""
e39c653dbab3b4fdc5118219c7b5179244d0e1b6 [gn build] Port a34887550b7f
fa5fdfb126f9beeaa2f719930ef951d339f41e36 [CodeGen] Remove extraneous ArrayRef (NFC) (#88601)

Update diff April 26th 2024, 1:35:43 pm

from: llvm/llvm-project@431be86
to: llvm/llvm-project@7696d36
commit: 753f6f7

Change Logs

from 431be8626696da6059eee26b9a14e1dc9fc0c37f to 7696d36b4ed595bf9681fd379d1dcbaf30c1ef0a

7696d36b4ed595bf9681fd379d1dcbaf30c1ef0a [Transforms] Debug values are not remapped when cloning. (#87747)
c4c9d4f306732c854fa88d2f30c1a22bb025d0c9 [M68k] Add support for MOVEQ instruction (#88542)
39f1b2de6f6d45de226292fd24e2a2ceaab6c82f Add test cases for SELECT->AND miscompiles in DAGCombiner
134e645645832af6fe9c15d121551de989aa81cf [clang][X86] Fix -Wundef warning in cpuid.h (#89842)
a670cdadca54910a8e65d5521f2119337fb0bd03 [AArch64] Add support for Neoverse-N3, Neoverse-V3 and Neoverse-V3AE (#90143)
8e2f6495c0bac1dd6ee32b6a0d24152c9c343624 [DAGCombiner] Do not always fold FREEZE over BUILD_VECTOR (#85932)
73472c5996716cda0dbb3ddb788304e0e7e6a323 [SelectionDAG] Treat CopyFromReg as freezing the value (#85932)

Update diff April 29th 2024, 11:50:19 am

from: llvm/llvm-project@df762a1
to: llvm/llvm-project@179e174
commit: 666eadb

Change Logs

from df762a1643bb5b0b3c907611d118c82d4b68a39d to 179e174945b6c0da462c534504720c9544aebf84

179e174945b6c0da462c534504720c9544aebf84 [mlir][bufferization][NFC] More documentation for runOneShotBufferize (#90445)
55c6bda01ef5a166a69b43956775272d9d67bda5 Revert "Revert "[SelectionDAG] Handle more opcodes in canCreateUndefOrPoison (#84921)" and more..."
95395ee51124792302390305b02cbeace5f07611 [X86] memcmp tests - merge check-prefixes. NFC.
b35bdb1d7b31c2267af14ee7e097c78d89c3ddb0 llvm-rc: add support for MENU in DIALOG(EX) (#89409)
37f2928ce382603fdadd7bae87fa245ac65b7d4f [clang] Use cwg_index.html from GitHub for DR status page (#90352)
f2452d4b689469b6da63d9e8ffa96eaf4b39ac5d [clang][Interp] Implement zero-init for record types
5b187751452e0702fc9c29b64ab301737718e604 [AMDGPU] Fix typo in #89773
2914a11e3fad5d5634272f028b2765ac182d6b20 [AMDGPU] Fix hard clausing for image instructions on gfx12 (#90221)
0c8151ac809c283187e9b19d0cbe72a09c8d74e0 [lldb][Test] Disable concurrent vfork tests on Arm and AArch64 Linux (again)
d72146f47156dc645b1c0a4cb9c72f01e6d6dd0e Re-apply "Emit missing cleanups for stmt-expr" and other commits (#89154)

Update diff April 30th 2024, 6:50:39 am

from: llvm/llvm-project@bd72f7b
to: llvm/llvm-project@6b961e2
commit: 3463ad8

Change Logs

from bd72f7b0ab98531ab579fafe79c7a8967994583a to 6b961e2abfffd8b5a508b5958849b13b0feafa50

6b961e2abfffd8b5a508b5958849b13b0feafa50 Revert "[C++20] [Modules] Don't skip pragma diagnostic mappings" and "[NFC] [C++20] [Modules] Use new class CXX20ModulesGenerator to generate module file for C++20 modules instead of PCHGenerator"
940ef9687f5f19ce02b7fa5d2eb6225f458fbdd9 [RISCV] Remove hasSideEffects=1 for saturating/fault-only-first instructions
fb21343473e33e9a886b42d2fe95d1cec1cd0030 [C++20] [Modules] Don't skip pragma diagnostic mappings
6e83058138210ab1e219d04974a071b57b3196e1 [RISCV] Use an assert insead of a if/else+llvm_unreachable. NFC
705636a1130551ab105aec95b909a35a0305fc9f [SelectionDAG][RISCV] Move VP_REDUCE* legalization to LegalizeDAG.cpp. (#90522)
18268ac0f48d93c2bcddb69732761971669c09ab [NFC] [C++20] [Modules] Use new class CXX20ModulesGenerator to generate module file for C++20 modules instead of PCHGenerator

Update diff April 25th 2024, 6:52:21 am

from: llvm/llvm-project@7a77b76
to: llvm/llvm-project@72b5814
commit: 970f4ea

Change Logs

from 7a77b763af3b6ac3218b9cf574d7d65f3196a4ec to 72b58146b14308c0c745111f082fc6354cefda22

72b58146b14308c0c745111f082fc6354cefda22 Revert "[NFC] [Serialization] Avoid using DeclID directly as much as possible"
011a65353b8b4dc018541f86356f2dfa0f124f1a [RISCV] Split out VSETVLIInfo AVL states to be more explicit (#89964)
2c9e2e9f0b75d6b023a388564092cc852ba29bd5 [RISCV][ISel] Eliminate andi rd, rs1, -1 instructions (#89976)
42070a5c092ed420bf92ebf38229c594885e94c7 [NFC] [Serialization] Avoid using DeclID directly as much as possible
c2a98fdeb3aede1a8db492a6ea30f4fa85b60edc [NFC] Move DeclID from serialization/ASTBitCodes.h to AST/DeclID.h (#89873)
fd5f06eb6d8d8b05846c8d7bd2431079ef707b37 [clang-repl] Fix the process return code if diagnostics occurred. (#89879)

Update diff June 13th 2024, 1:06:36 pm

from: llvm/llvm-project@7ca52cd
to: llvm/llvm-project@ffab938
commit: da8c60c

Change Logs

from 7ca52cde750c980c048cde2199c720431ec2acee to ffab938f50fa999f2218976f7de78cf8e4f70d4e

ffab938f50fa999f2218976f7de78cf8e4f70d4e [clang][Interp] Handle BooleanToSignedIntegral casts
4f09ac7705b3b24492d521a97571404c2e9a1f8e Fix off-by-one issue found by post-commit review
9b46838836a093d6732d47261b820f3b7bbf8a5f Reapply "[Flang] Use PrintModulePass to print LLVM IR from the frontend (#95142)" (#95306)
76c5158aed52bbf21980752e38262e925cd8db8e [DAG] combineShiftToAVG - don't create avgfloor with scalar constant operands unless legal.
71e4d70f0bb04bae6c8521c711c770293fd228a5 [clang][NFC] Update CWG issues list

Update diff May 22nd 2024, 3:49:31 pm

from: llvm/llvm-project@7d9634e
to: llvm/llvm-project@5b20595
commit: 0aca432

Change Logs

from 7d9634e527fe52bf20a9036be6e5771f8fc4de17 to 5b205956e16e09af117c45e2eab625fce7a05b95

5b205956e16e09af117c45e2eab625fce7a05b95 [SLP] NFC. Reduce newTreeEntry usage. (#92994)
cb6a62369a353f506a1dde087eeaf5ebea5d5c26 Add AddNull argument to CreateGlobalString. (#93036)
2bde13cda1e389599413132028731f18fb5c03c3 [clang] NFCI: use TemplateArgumentLoc for NTTP DefaultArgument (#92852)
30d484fa994577216736e797b6c6e74483a56641 [SLP]Fix a crash when trying to convert masked gather nodes to strided.
154d93b7f258cdf1157b5e5d61dd9477ffd3db53 [AMDGPU] Add a negative test for DPP combine into v_mul_lo_u32
bd46067abf6a3ed712f24670cf7c4b1e574a9739 [bazel] fix build for 7630379156ec08c9d7b1ea3c03c09e7dc89ef4ee
d41dde70c44a10f9761242df73fdd288c4660c8d LiveRangeEdit: Replace setIsDead with an assert (#92964)
a70ecfb267e1fe7d72c94a3cf1675b1f8df99860 [bazel] fix build for b00e0c167186d69e1e6bceda57c09b272bd6acfc
9e0be65f24bca1bd95c25d3191c75461a080af49 [AMDGPU] Fix broken MIR generated by gfx11 simulated trap lowering (#91652)
9276a03b5492d0ac62c48c4313139dbf32d7b9e1 MIPS/Clang: Add more false option pairs into validateTarget (#91968)
1d4772f24d19b36ed07b2434e9e6382e18ffbe08 [bazel] add bolt address translation header to Passes (#93014)
c8dc6b59d68635f73d2970b7fc8bc9c6c2684098 [SDAG] Improve SimplifyDemandedBits for mul (#90034)
831d1435193e73026e03e006a5b86591f3d202b3 [Offload] libomptarget force dlopen vendor libraries by default. (#92788)
183beb33d7f8847c04870e425d75f27db1cf5847 [llvm-objcopy] Check for missing argument values (#70710)
7630379156ec08c9d7b1ea3c03c09e7dc89ef4ee [mlir][emitc] Add EmitC lowering for arith.trunci, arith.extsi, arith.extui
267de8543c8671baa7e12c4d181e6c4e6e2342cd [llvm-mca][AArch64] Add AArch64 version of clearsSuperRegisters. (#92548)

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