dwesterg/atlas-soc-ghrd

atlas-soc-ghrd's Issues

Porting to 20.1; kernel oops because of devicetree

Trying to port this to 20.1 toolchain, using hints from cyclone5 dev kit instructions. I am able to get the sof and uboot compiled and working, but I am having problems with the linux kernel devicetree. Here's what I am using for the fpga tree.

/ {
	clocks {
		#address-cells = <1>;
		#size-cells = <1>;

		clk_0: clk_0 {
			compatible = "fixed-clock";
			#clock-cells = <0>;
			clock-frequency = <50000000>;	/* 50.00 MHz */
			clock-output-names = "clk_0-clk";
		}; //end clk_0 (clk_0)
	}; //end clocks

	soc {
		ranges;
		compatible = "ALTR,avalon", "simple-bus";

		hps_0_bridges: bridge@0xc0000000 {
			compatible = "altr,bridge-20.1", "simple-bus";
			reg = <0xc0000000 0x20000000>,
				<0xff200000 0x00200000>;
			reg-names = "axi_h2f", "axi_h2f_lw";
			clocks = <&clk_0 &clk_0>;
			clock-names = "h2f_axi_clock", "h2f_lw_axi_clock";
			#address-cells = <2>;
			#size-cells = <1>;
			ranges = <0x00000000 0x00000000 0xc0000000 0x00010000>,
				<0x00000001 0x00020000 0xff220000 0x00000008>,
				<0x00000001 0x00010000 0xff210000 0x00000008>,
				<0x00000001 0x00000000 0xff200000 0x00000010>;

			jtag_uart: serial@0x100020000 {
				compatible = "altr,juart-20.1", "altr,juart-1.0";
				reg = <0x00000001 0x00020000 0x00000008>;
				interrupts = <0 42 4>;
				clocks = <&clk_0>;
			}; //end serial@0x100020000 (jtag_uart)

			sysid_qsys: sysid@0x100010000 {
				compatible = "altr,sysid-20.1", "altr,sysid-1.0";
				reg = <0x00000001 0x00010000 0x00000008>;
				clocks = <&clk_0>;
				id = <2899645186>;	/* embeddedsw.dts.params.id type NUMBER */
				timestamp = <1608257735>;	/* embeddedsw.dts.params.timestamp type NUMBER */
			}; //end sysid@0x100010000 (sysid_qsys)

			pio_led: gpio@0x100000000 {
				compatible = "altr,pio-20.1", "altr,pio-1.0";
				reg = <0x00000001 0x00000000 0x00000010>;
				clocks = <&clk_0>;
				altr,gpio-bank-width = <8>;	/* embeddedsw.dts.params.altr,gpio-bank-width type NUMBER */
				resetvalue = <255>;	/* embeddedsw.dts.params.resetvalue type NUMBER */
				#gpio-cells = <2>;
				gpio-controller;
			}; //end gpio@0x100000000 (pio_led)
		}; //end bridge@0xc0000000 (hps_0_bridges)

		soc_leds: leds {
			compatible = "gpio-leds";	/* appended from boardinfo */

			led_fpga0: fpga0 {
				label = "fpga_led0";	/* appended from boardinfo */
				gpios = <&pio_led 0 1>;	/* appended from boardinfo */
			}; //end fpga0 (led_fpga0)

			led_fpga1: fpga1 {
				label = "fpga_led1";	/* appended from boardinfo */
				gpios = <&pio_led 1 1>;	/* appended from boardinfo */
			}; //end fpga1 (led_fpga1)

			led_fpga2: fpga2 {
				label = "fpga_led2";	/* appended from boardinfo */
				gpios = <&pio_led 2 1>;	/* appended from boardinfo */
			}; //end fpga2 (led_fpga2)

			led_fpga3: fpga3 {
				label = "fpga_led3";	/* appended from boardinfo */
				gpios = <&pio_led 3 1>;	/* appended from boardinfo */
			}; //end fpga3 (led_fpga3)

			led_fpga4: fpga4 {
				label = "fpga_led4";	/* appended from boardinfo */
				gpios = <&pio_led 4 1>;	/* appended from boardinfo */
			}; //end fpga4 (led_fpga4)

			led_fpga5: fpga5 {
				label = "fpga_led5";	/* appended from boardinfo */
				gpios = <&pio_led 5 1>;	/* appended from boardinfo */
			}; //end fpga5 (led_fpga5)

			led_fpga6: fpga6 {
				label = "fpga_led6";	/* appended from boardinfo */
				gpios = <&pio_led 6 1>;	/* appended from boardinfo */
			}; //end fpga6 (led_fpga6)

			led_fpga7: fpga7 {
				label = "fpga_led7";	/* appended from boardinfo */
				gpios = <&pio_led 7 1>;	/* appended from boardinfo */
			}; //end fpga7 (led_fpga7)
		}; //end leds (soc_leds)
	}; //end sopc@0 (sopc0)
}; //end /

When I boot the kernel, it crashes just before starting system services. How do I fix this? It must be a problem with the gpio/led definitions, since if I remove them, it boots fine.

[    1.383507] 8<--- cut here ---
[    1.386554] Unhandled fault: imprecise external abort (0x406) at 0x76f74550
[    1.393483] pgd = (ptrval)
[    1.396177] [76f74550] *pgd=00000000
[    1.399743] Internal error: : 406 [#1] SMP ARM
[    1.404166] Modules linked in:
[    1.407211] CPU: 1 PID: 1 Comm: swapper/0 Not tainted 5.4.23-03461-gb6dad2fd8d54-dirty #2
[    1.415349] Hardware name: Altera SOCFPGA
[    1.419352] PC is at altera_gpio_direction_output+0x40/0x94
[    1.424900] LR is at altera_gpio_direction_output+0x30/0x94
[    1.430447] pc : [<c04eb2c0>]    lr : [<c04eb2b0>]    psr: 60000093
[    1.436683] sp : ef0f5c40  ip : 00000000  fp : ef0f5c64
[    1.441883] r10: ef1dcc10  r9 : 00000000  r8 : a0000013
[    1.447083] r7 : ef1c5968  r6 : 00000000  r5 : ef1c5840  r4 : 00000001
[    1.453579] r3 : f086e000  r2 : ef1c5968  r1 : 00000000  r0 : a0000013
[    1.460076] Flags: nZCv  IRQs off  FIQs on  Mode SVC_32  ISA ARM  Segment none
[    1.467263] Control: 10c5387d  Table: 0000404a  DAC: 00000051
[    1.472983] Process swapper/0 (pid: 1, stack limit = 0x(ptrval))

Compiling Altera's Atlas SOC design is failing

Instructions are not working.
https://rocketboards.org/foswiki/view/Documentation/AtlasSoCCompileHardwareDesign#3

mkdir atlas
cd atlas
wget https://github.com/dwesterg/atlas-soc-ghrd/tarball/master -O atlas-soc-ghrd.tgz
mkdir atlas-soc-ghrd
tar -xzvf atlas-soc-ghrd.tgz --strip-components 1 -C atlas-soc-ghrd
cd atlas-soc-ghrd
make all

This ends in a bug described here:
https://www.altera.com/support/support-resources/knowledge-base/solutions/rd05082015_486.html

The workaround doesn't work. The qsys-script in Quartus 16.0 is still crashing.

rstmgr missing from dts

The file arch/arm/boot/socfpga.dtsi from the kernel sources used by the linux-altera recipe specifies a rstmgr called rst and uses it in the resets lines of e.g. gmac1 (the ethernet MAC). This becomes the default DTB as described in the atlas_sd_card_image_creation.s script and the Linux kernel initializes Ethernet fine with that.

But when I try to use the ATLAS_SOC_GHRD/soc_system.dts to boot the machine, both the rst block and all resets lines are missing and the kernel fails to initialize the hardware with messages like these:

altera_hps2fpga_bridge sopc@0:fpgabridge@0: Could not get hps2fpga reset control!
altera_hps2fpga_bridge: probe of sopc@0:fpgabridge@0 failed with error -22
altera_hps2fpga_bridge sopc@0:fpgabridge@1: Could not get lwhps2fpga reset control!
altera_hps2fpga_bridge: probe of sopc@0:fpgabridge@1 failed with error -22
altera_hps2fpga_bridge sopc@0:fpgabridge@2: Could not get fpga2hps reset control!
altera_hps2fpga_bridge: probe of sopc@0:fpgabridge@2 failed with error -22
stmmaceth ff702000.ethernet: snps,phy-addr property is deprecated
stmmaceth ff702000.ethernet: Could not get reset control!
stmmaceth ff702000.ethernet: No sysmgr-syscon node found
stmmaceth ff702000.ethernet: Unable to parse OF data

Any idea how I can convince the sopc2dts tool to create a valid DTS and DTB?