eclipse-threadx/threadx

Eclipse ThreadX is an advanced real-time operating system (RTOS) designed specifically for deeply embedded applications.

Eclipse ThreadX RTOS

This advanced real-time operating system (RTOS) is designed specifically for deeply embedded applications. Among the multiple benefits it provides are advanced scheduling facilities, message passing, interrupt management, and messaging services. Eclipse ThreadX RTOS has many advanced features, including picokernel architecture, preemption threshold, event chaining, and a rich set of system services.

Here are the key features and modules of ThreadX:

Getting Started

Eclipse ThreadX has been integrated to the semiconductor's SDKs and development environment. You can develop using the tools of choice from STMicroelectronics, NXP, Renesas and Microchip.

We also provide getting started guide and samples using development boards from semiconductors you can build and test with.

See Overview of Eclipse ThreadX RTOS for the high-level overview.

Repository Structure and Usage

Directory layout

.
├── cmake                        # CMakelist files for building the project
├── common                       # Core ThreadX files
├── common_modules               # Core ThreadX module files
├── common_smp                   # Core ThreadX SMP files
├── docs                         # Documentation supplements
├── ports                        # Architecture and compiler specific files. See below for directory breakdown     
│   ├── cortex_m7     
│   │   ├── iar                  # Example IAR compiler sample project
│   │   │   ├── example build    # IAR workspace and sample project files
│   │   │   ├── inc              # tx_port.h for this architecture
│   │   │   └── src              # Source files for this architecture
│   │   ├── ac6                  # Example ac6/Keil sample project
│   │   ├── gnu                  # Example gnu sample project
│   │   └── ...
│   └── ...        
├── ports_modules                # Architecture and compiler specific files for threadX modules
├── ports_smp                    # Architecture and compiler specific files for threadX SMP
├── samples                      # demo_threadx.c
└── utility                      # Test cases and utilities

Branches & Releases

The master branch has the most recent code with all new features and bug fixes. It does not represent the latest General Availability (GA) release of the library. Each official release (preview or GA) will be tagged to mark the commit and push it into the Github releases tab, e.g. v6.2-rel.

When you see xx-xx-xxxx, 6.x or x.x in function header, this means the file is not officially released yet. They will be updated in the next release. See example below.

/**************************************************************************/
/*                                                                        */
/*  FUNCTION                                               RELEASE        */
/*                                                                        */
/*    _tx_initialize_low_level                          Cortex-M23/GNU    */
/*                                                           6.x          */
/*  AUTHOR                                                                */
/*                                                                        */
/*    Scott Larson, Microsoft Corporation                                 */
/*                                                                        */
/*  DESCRIPTION                                                           */
/*                                                                        */
/*    This function is responsible for any low-level processor            */
/*    initialization, including setting up interrupt vectors, setting     */
/*    up a periodic timer interrupt source, saving the system stack       */
/*    pointer for use in ISR processing later, and finding the first      */
/*    available RAM memory address for tx_application_define.             */
/*                                                                        */
/*  INPUT                                                                 */
/*                                                                        */
/*    None                                                                */
/*                                                                        */
/*  OUTPUT                                                                */
/*                                                                        */
/*    None                                                                */
/*                                                                        */
/*  CALLS                                                                 */
/*                                                                        */
/*    None                                                                */
/*                                                                        */
/*  CALLED BY                                                             */
/*                                                                        */
/*    _tx_initialize_kernel_enter           ThreadX entry function        */
/*                                                                        */
/*  RELEASE HISTORY                                                       */
/*                                                                        */
/*    DATE              NAME                      DESCRIPTION             */
/*                                                                        */
/*  09-30-2020      Scott Larson            Initial Version 6.1           */
/*  xx-xx-xxxx      Scott Larson            Include tx_user.h,            */
/*                                            resulting in version 6.x    */
/*                                                                        */
/**************************************************************************/ 

Supported Architecture Ports

ThreadX

arc_em      cortex_a12        cortex_m0     cortex_r4
arc_hs      cortex_a15        cortex_m23    cortex_r5
arm11       cortex_a17        cortex_m3     cortex_r7
arm9        cortex_a34        cortex_m33    
c667x       cortex_a35        cortex_m4    
linux       cortex_a5         cortex_m55
risc-v32    cortex_a53        cortex_m7
rxv1        cortex_a55        cortex_m85
rxv2        cortex_a57
rxv3        cortex_a5x
win32       cortex_a65
xtensa      cortex_a65ae
            cortex_a7
            cortex_a72
            cortex_a73
            cortex_a75
            cortex_a76
            cortex_a76ae
            cortex_a77
            cortex_a8
            cortex_a9

ThreadX Modules

Eclipse ThreadX Modules component provides an infrastructure for applications to dynamically load modules that are built separately from the resident portion of the application.

cortex_a35
cortex_a35_smp
cortex_a7
cortex_m0+
cortex_m23
cortex_m3
cortex_m33
cortex_m4
cortex_m7
cortex_r4
rxv2

ThreadX SMP

Eclipse ThreadX SMP is a high-performance real-time SMP kernel designed specifically for embedded applications.

arc_hs_smp
cortex_a34_smp
cortex_a35_smp
cortex_a53_smp
cortex_a55_smp
cortex_a57_smp
cortex_a5x_smp
cortex_a5_smp
cortex_a65ae_smp
cortex_a65_smp
cortex_a72_smp
cortex_a73_smp
cortex_a75_smp
cortex_a76ae_smp
cortex_a76_smp
cortex_a77_smp
cortex_a78_smp
cortex_a7_smp
cortex_a9_smp
linux

Adaptation layer for ThreadX

ThreadX is an advanced real-time operating system (RTOS) designed specifically for deeply embedded applications. To help ease application migration to ThreadX RTOS, Eclipse ThreadX provides adaption layers for various legacy RTOS APIs (FreeRTOS, POSIX, OSEK, etc.).

Component dependencies

The main components of ThreadX RTOS are each provided in their own repository, but there are dependencies between them, as shown in the following graph. This is important to understand when setting up your builds.

You will have to take the dependency graph above into account when building anything other than ThreadX itself.

Building and using the library

Instruction for building the ThreadX as static library using Arm GNU Toolchain and CMake. If you are using toolchain and IDE from semiconductor, you might follow its own instructions to use ThreadX RTOS components as explained in the Getting Started section.

1. Install the following tools:

   • CMake version 3.0 or later
   • Arm GNU Toolchain for arm-none-eabi
   • Ninja

2. Cloning the repo

   $ git clone https://github.com/eclipse-threadx/threadx.git

3. Define the features and addons you need in tx_user.h and build together with the component source code. You can refer to tx_user_sample.h as an example.

4. Building as a static library

   Each component of ThreadX RTOS comes with a composable CMake-based build system that supports many different MCUs and host systems. Integrating any of these components into your device app code is as simple as adding a git submodule and then including it in your build using the CMake add_subdirectory().

   While the typical usage pattern is to include ThreadX into your device code source tree to be built & linked with your code, you can compile this project as a standalone static library to confirm your build is set up correctly.

   An example of building the library for Cortex-M4:

   $ cmake -Bbuild -GNinja -DCMAKE_TOOLCHAIN_FILE=cmake/cortex_m4.cmake .
   
   $ cmake --build ./build

Licensing

License terms for using Eclipse ThreadX are defined in the LICENSE.txt file of this repo. Please refer to this file for all definitive licensing information for all content, incl. the history of this repo.

Resources

The following are references to additional ThreadX RTOS resources:

• Product introduction: https://github.com/eclipse-threadx/rtos-docs
• Product issues and bugs, or feature requests: https://github.com/eclipse-threadx/threadx/issues
• TraceX Installer: https://aka.ms/azrtos-tracex-installer

You can also check previous questions or ask new ones on StackOverflow using the threadx-rtos and threadx tags.

Security

Eclipse ThreadX provides OEMs with components to secure communication and to create code and data isolation using underlying MCU/MPU hardware protection mechanisms. It is ultimately the responsibility of the device builder to ensure the device fully meets the evolving security requirements associated with its specific use case.

Contribution

Please follow the instructions provided in the CONTRIBUTING.md for the corresponding repository.

threadx's Issues

riscv gnu port

Are there any plans for a risc-v gnu port? I am trying to port the risc-v iar port into gnu but is running into issues mapping the iar directives as well as understanding in general what needs to be ported.

The things that are ported between each platform seems to be very inconsistent (or not well documented) unlike FreeRTOS which has a well defined set of things that needs to be ported in each platform. Particularly, there's no template for tx_port.h and each of the ports seems to port a different set of threadx api.

why _txm_module_manager_user_mode_entry can be called directly in the user mode ?

when the module run in user mode, and request a kernel service, it call _txm_module_kernel_call_dispatcher .
_txm_module_kernel_call_dispatcher is actualy point to _txm_module_manager_user_mode_entry

    _txm_module_kernel_call_dispatcher =  thread_info -> txm_module_thread_entry_info_kernel_call_dispatcher;

...
if (thread_ptr -> tx_thread_module_user_mode)
{
thread_entry_info -> txm_module_thread_entry_info_kernel_call_dispatcher = _txm_module_manager_user_mode_entry;
}

but

_txm_module_manager_user_mode_entry is belong to module_manager， I think it is in the kernel space
why user space code can directly call kernel space ?
It is so hard to understand.

Use clang-format to ensure consistent style?

Several Microsoft open source projects already use clang-format to indent, such as ONNX Runtime and STL. Will ThreadX project take it for consistent code style?

unused line at arc-em porting

hi, the line below is doing nothing (except of using processor time and code space), as no one is doing something with the data loaded to %4.
https://github.com/azure-rtos/threadx/blob/609c75a2e51735fa3ad894e0caef595ab71ba6c9/ports/arc_em/metaware/src/tx_timer_interrupt.s#L190

I am not sure if the right way is to remove this line (and the context_restore function do what needed when preempt_disable is on) or need to do something with this value

Exporting the Trace Buffer without development tools

I have a question for TraceX.
Because the platform I'm using can't debugging the device with any development tools.
When the program is running, can traceX buffer content be entered into a file periodically for override saving?
If I can do this, I need to pay attention to something.thanks~~

CMAKE_SYSTEM_PROCESSOR not right?

In cortex_m0.cmake & cortex_m3.cmake
set(CMAKE_SYSTEM_PROCESSOR cortex-m4)
in cortex_m0.cmake, cortex-m4 -> cortex-m0 ?
in cortex_m3, cmake, cortex-m4 -> cortex-m3 ?

TX_NO_MEMORY is equivalent to TX_START_ERROR in tx_api.h

Is this bug?

#define TX_SUCCESS                      ((UINT) 0x00)
#define TX_DELETED                      ((UINT) 0x01)
#define TX_NO_MEMORY                    ((UINT) 0x10)
#define TX_POOL_ERROR                   ((UINT) 0x02)
#define TX_PTR_ERROR                    ((UINT) 0x03)
#define TX_WAIT_ERROR                   ((UINT) 0x04)
#define TX_SIZE_ERROR                   ((UINT) 0x05)
#define TX_GROUP_ERROR                  ((UINT) 0x06)
#define TX_NO_EVENTS                    ((UINT) 0x07)
#define TX_OPTION_ERROR                 ((UINT) 0x08)
#define TX_QUEUE_ERROR                  ((UINT) 0x09)
#define TX_QUEUE_EMPTY                  ((UINT) 0x0A)
#define TX_QUEUE_FULL                   ((UINT) 0x0B)
#define TX_SEMAPHORE_ERROR              ((UINT) 0x0C)
#define TX_NO_INSTANCE                  ((UINT) 0x0D)
#define TX_THREAD_ERROR                 ((UINT) 0x0E)
#define TX_PRIORITY_ERROR               ((UINT) 0x0F)
#define TX_START_ERROR                  ((UINT) 0x10)

Caveats when converting tx_initialize_low_level.S from Assembly to C

I was able to convert the tx_initialize_low_level.S threadx startup file from Assembly to C for my personal project Link here.

After going through the entire process I have a few questions to ask

1. The C version of the code is around 32 bytes smaller than the Assembly version of the same (when compiling with Os). Is there any reason/caveats for using Assembly over C or vice versa?
2. This is assuming that my above conversion is fine in the long run. Currently, I have only tested threadx tasks and that seems to work fine. Would it be possible to review this file and provide any comments here if there are some considerations to be made?
3. I noticed that there are certain handler functions that are being declared but I cannot find their usage anywhere. Why have they been defined?

• __tx_IntHandler
• __tx_SysTickHandler however SysTick_Handler (which runs the same chunk of code) is used since it overrides the weak linkage of the startup function.
• __tx_BadHandler
• __tx_HardfaultHandler
• __tx_SVCallHandler
• __tx_NMIHandler
• __tx_DBGHandler

Currently, I haven't tried to make too many changes to the C version of the tx_initialize_low_level and have translated it from assembly to C as closely as possible.
Any pointers or clarification to the above questions would be great!

About tx_timer

Is there some demo for create a tx_timer?
I'm always failed on create a timer. And can't find a demo for it.

how to enable tickless?

is threadx support tickless mode?

Win32 or Linux Port?

ThreadX requires Win32 or Linux simulation ! Like for example FreeRTOS or uCOS-III.
Can we expect such an implementation for the future ?

how to use TraceX

Thanks！

Is an port of the M33 available i am using stmL5 ?

I have a NUCLEO-L552ZE board for my development, which uses the arm cortex M33 chip. Is a port of the same available.

SMP Port for x86 GNU and Win32

Hi Admin,

Is there any plan to upload code support for SMP on x86 for GNU or Win32?

doing in two lines what can do in one

the second line here is nonsense (comparing the interrupt register with the thread pointer) and suppose to be alwais branch:
https://github.com/azure-rtos/threadx/blob/609c75a2e51735fa3ad894e0caef595ab71ba6c9/ports/arc_em/metaware/src/tx_thread_context_restore.s#L165-L166

I think you can replace it with:
breq r2, 0, __tx_thread_preempt_restore ; If not set, preempt executing thread

RasPi support?

When will the Raspberry Pi be supported?

Plugin for Ozone debugger

Hello!
SEGGER J-Links are popular and Ozone itself is free, so I think plugin for Ozone debugger can become an important part of ecosystem around Azure RTOS...

suspend all threads?

how to suspend all threads? function analog "vTaskSuspendAll ()" in FreeRTOS.

Do you plan to port to TC275?

Do you plan to port to TC275?
My Email:[email protected]

RH850 port

Do you plan to port to RH850? I see that ThreadX has passed the ASIL D certification of ISO26262.

lose of 4 bytes on the stack when the stack start at aligned address and its size is aligned

when you are calculating the thread stack end (at thread_create or module_manager_thread_create or module_manager_internal_load), you are calculating it as stack start + stack size -1, which gives you the upper boundary of the stack.

the problem is that in the stack_build (/module_manager_stack_build) porting functions (at both monolithic and modules) you are taking the initial stack pointer as the stack end calculated above, with alignment.
this is bad because the initial stack pointer should be one address bigger than the biggest address of the stack.

here is example that will explain this:
let say that we need to be align to 4 bytes, stack_size = 8 and stack_start = 0.
at your calculation: stack end will be at '0+8-1 = 7,' and the initial stack pointer will be at '7 aligned to 4 = 4'.
but if you will put the stack pointer at 8 (which will save 4 bytes), nothing would be put at address 8 because the compiler (at least the arc compiler I am working with, but I think all compilers are working like this) not supposed to put anything at the address that the stack pointer is pointing to when function was called, but is substracting the stack pointer by the number of bytes he need to use (let say 4, so now the stack pointer is 4) and there it is storing the data.

(the change can be done by changing the stack end calculation or [less good] by adding one to the stack pointer before setting its alignment)

I am using threadx modules 6.1.1, I will be happy if you can fix it in 6.1.x version

call tx_trace_enable() return 0x1D

Hi, the module I use has an MMU unit, and the kernel and the user layer are memory mapped. When I call tx_trace_enable() in a thread, it returns 0x1D==》TX_NOT_AVAILABLE. What does this mean?
Can't I use this feature?

Licensed Hardware list

I can see on the Azure website this list of hardware partners: https://azure.microsoft.com/en-us/services/rtos/#partners
which I presume are (will be?) the so called "pre-licensed devices". Is this correct? If yes, can the list on LICENSED-HARDWARE.txt be updated to reflect this?

Thanks!

region `UNPLACED_SECTIONS' overflowed by 4 bytes

I'm trying to run ThreadX on a stm32f0 (cortex-m0) chip. And the final step, an error occurs.
region 'UNPLACED_SECTIONS' overflowed by 4 bytes

Here is the sample LD file from official code, why there is something related to CM3???

MEMORY
{
  UNPLACED_SECTIONS (wx) : ORIGIN = 0x100000000, LENGTH = 0  
  CM3_System_Control_Space (wx) : ORIGIN = 0xe000e000, LENGTH = 0x00001000  
  AHB_Peripherals (wx) : ORIGIN = 0x50000000, LENGTH = 0x00200000  
  APB1_Peripherals (wx) : ORIGIN = 0x40080000, LENGTH = 0x00080000  
  APB0_Peripherals (wx) : ORIGIN = 0x40000000, LENGTH = 0x00080000  
  GPIO (wx) : ORIGIN = 0x2009c000, LENGTH = 0x00004000  
  AHBSRAM1 (wx) : ORIGIN = 0x20080000, LENGTH = 0x00004000  
  AHBSRAM0 (wx) : ORIGIN = 0x2007c000, LENGTH = 0x00004000  
  RAM (wx) : ORIGIN = 0x10000000, LENGTH = 0x00008000  
  FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 0x00080000  
}

Plan for SMP support?

As I know, ThreadX had been added SMP support long time ago, but it seems that multicore SMP feature was not included in Azure RTOS release, any plan on this?

Missing error check of function tx_thread_resume()

Hi,
As described in the ThreadX documentation, function tx_thread_resume() resumes or prepares for execution a thread that was previously suspended by a tx_thread_suspend call, returns TX_SUCCESS if there is a successful thread resume, and returns error values if not. However, as shown in the following code, a missing error check take places.
https://github.com/azure-rtos/threadx/blob/6773d468ae877ce36feda1c86842510fb33501a3/common_modules/module_manager/src/txm_module_manager_start.c#L220-L221

Furthermore, the return values of function tx_thread_resume() from other call sites are checked. See the following code, for example.
https://github.com/azure-rtos/threadx/blob/6773d468ae877ce36feda1c86842510fb33501a3/utility/rtos_compatibility_layers/FreeRTOS/tx_freertos.c#L347-L351
https://github.com/azure-rtos/threadx/blob/6773d468ae877ce36feda1c86842510fb33501a3/utility/rtos_compatibility_layers/FreeRTOS/tx_freertos.c#L425-L428

Also, in the same file, maybe the following code about function tx_mutex_put() is needed an error check.
https://github.com/azure-rtos/threadx/blob/6773d468ae877ce36feda1c86842510fb33501a3/common_modules/module_manager/src/txm_module_manager_start.c#L217-L218

Threadx

Nios II Port

Hi, i'm having an issue with Threadx. The official site of Azure-rtos claims that threadx supports nios II architecture but here i can't find the port for it.
Is there any way to get those ports?
Kindly
Giacomo

Support azure iot hub device SDK?

For connection with azure iot hub, I find getting-started, which demos simple connection over MQTT. For complete function, do you have a plan to support azure iot hub device SDK?

How to port threadx to a real chip?

Hello,

I was trying to make threadx work on a board with the chip of STM32F407ZG（which is a Cortex-M4 chip）, my dev-tool is keil's mdk-arm, debuger is j-link.

Seems it's not so easy as the readme describe, j-link says it need to know the real chip type number to download the image, after set that, I got error messages as below:

No Algorithm found for: 00000000H - 00002043H
Erase skipped!
Error: Flash Download failed - "Cortex-M4"

So, how to fix that?

Will azure-rtos support BLE and BLE mesh?

Support the option that _txm_module_kernel_call_dispatcher is part of the module code

hello
in the non common (non porting) code, yoe are assuming that _txm_module_kernel_call_dispatcher is global variable that holding the pointer to the dispatcher function.
https://github.com/azure-rtos/threadx/blob/609c75a2e51735fa3ad894e0caef595ab71ba6c9/common_modules/inc/txm_module.h#L521-L524

In my system, the dispatcher function will be part of the module code (for example, if I want to do something each time before running the real dispatcher), and hence known to the module at compilation time. of course I can initialize the global at _txm_module_thread_shell_entry with the pointer to my dispatcher function, but I want to not use this global (saving a little run time, saving ram space and less mistakes as it can't get change at run time).

I don't want to touch in my system your common code, so I won't have problems with updating each time to yours last version. can you surround this extern with:
#ifndef KERNEL_CALL_DISPATCHER
#define KERNEL_CALL_DISPATCHER
...
#endif
Or put this extern at the porting file (which I don't care to change) or find other solution for me?

any way to run on qemu emulator on target cortex-A port? such as cortex-a7 or else?

HI folks:
i compile ok and gennerante the elf result object on cortex-a sample project, and the next i want to do to run it, firstly i want to run it on qemu first, so could you show me anyway i can do this on qemu to test my compile result?

thank you!

adding realloc functionality to byte pool

When linking libraries with RTOS project, one need to provide allocation functions. if he decide to use byte pool for that, the creation of free, malloc and calloc is easy.
but realloc is more problematic - with little digging in to how block of byte pool is built he can get the size of the block and do malloc-memcpy-free, but this approach fragments the pool and taking time, I want to know if you are planing to support good realloc (resizing the block if can)?

make changing thread struct easier

for now, changing the thread struct (for example by changing TX_THREAD_EXTENSION_1) is very complicated, because in the porting assembly files (where I looked) you put hardcoded the struct element offsets, for example here:
https://github.com/azure-rtos/threadx/blob/609c75a2e51735fa3ad894e0caef595ab71ba6c9/ports_module/cortex-m3/iar/module_manager/src/tx_thread_schedule.s#L511

please make it in other way so changing the struct won't enforce changing in all the porting files

Name clash between tx_thread_entry_exit_notify function pointer and define

Hi,

my goal is to implement a CPU consumption profiler on a per-thread basis on a Cortex-M4 hardware (GCC).
My thought was to implement _tx_execution_thread_exit and _tx_execution_thread_enter by myself (is there any documentation about that? i.e. function signatures, examples?) There I wanted to use tx_thread_identify to gain access to the thread control block of the current thread to be able to trigger the tx_thread_entry_exit_notify callback of the current thread by passing TX_THREAD_ENTER and TX_THREAD_EXIT, respectively. It will trigger the entry/exit callback, that must be registered with tx_thread_entry_exit_notify, not only at enter- and exit-event, but also upon context switch. This is my basic intention.

Therefore I had to include tx_api.h. In that header file, there is the following define:
#define tx_thread_entry_exit_notify _txe_thread_entry_exit_notify

Now, the compiler complains about CurrentThread->tx_thread_entry_exit_notify, which will result in CurrentThread->_txe_thread_entry_exit_notify, that does not exist.

I know about the TX_SOURCE_CODE define. But is it really desired?

Best regards

POSIX?

will POSIX be implemented?

why enable the irq so early on pensv handler of M4 port?

HI guys:

i found there is somthing differnce withe pendsv critical section install compare to the ucos and zephyr port on Cortex-M
on ucos, all the pendsv are a big critical setions areas so the thread switch op cant be interrupted by async things.

but on threadx porting, it seems the "CPSIE I" was executed before the" __tx_ts_restore " of exectuing, it this safe if
interrupt happend just after flow of cpsie i or some instructions later of folllow ing instruct series?

thank you!
__tx_ts_new:
@
@ /* Now we are looking for a new thread to execute! /
@
CPSID i @ Disable interrupts
LDR r1, [r2] @ Is there another thread ready to execute?
CBZ r1, __tx_ts_wait @ No, skip to the wait processing
@
@ / Yes, another thread is ready for else, make the current thread the new thread. /
@
STR r1, [r0] @ Setup the current thread pointer to the new thread
CPSIE i @ Enable interrupts
@
@ / Increment the thread run count. /
@
__tx_ts_restore:
LDR r7, [r1, #4] @ Pickup the current thread run count
LDR r4, =_tx_timer_time_slice @ Build address of time-slice variable
LDR r5, [r1, #24] @ Pickup thread's current time-slice
ADD r7, r7, #1 @ Increment the thread run count
STR r7, [r1, #4] @ Store the new run count
@
@ / Setup global time-slice with thread's current time-slice. */

Missing error check of function tx_thread_identify()

Hi,
As described in the ThreadX documentation, function tx_thread_identify() retrieves pointer to currently executing thread, returns a pointer to the currently executing thread if there is a thread is executing, and returns TX_NULL if not. However, as shown in the following code, a missing error check take places, and then the return value is used.
https://github.com/azure-rtos/threadx/blob/6773d468ae877ce36feda1c86842510fb33501a3/utility/rtos_compatibility_layers/FreeRTOS/tx_freertos.c#L211-L213
https://github.com/azure-rtos/threadx/blob/6773d468ae877ce36feda1c86842510fb33501a3/utility/rtos_compatibility_layers/FreeRTOS/tx_freertos.c#L501-L503
Moreover, in this file, there are also some other call sites of function tx_thread_identify() appearing the same problem.

No source or install for TraceX

Not sure where to put this bug, but there is no repository for TraceX, and the online docs at:

https://docs.microsoft.com/en-us/azure/rtos/tracex/ The "Download TraceX leads to a 404 error.

SMP code for MIPS CPU not found

The THREADX official documentation shows that threadx could support MIPS cpu， but there is no MIPS cpu source code in ports and smp directories at all. So the threadx could really support MIPS cpu and it`s SMP？ where could I get support？

gnu version of the cortex_m33 port?

Is it possible to get the gnu compatible version of the cortex_m33 port? Or at least something that would help would be to maybe have a quick doc on the main differences between gnu/iar/keil/etc. ports?

no member named 'bsd errno' in 'struct TX_THREAD_STRUCT'

addons\BSD\nxd_bsd.c(9562): error: no member named 'bsd_errno' in 'struct TX_THREAD_STRUCT'
addons\BSD\nxd_bsd.c(9619): error: no member named 'bsd_errno' in 'struct TX_THREAD_STRUCT'
two errors are found when I use bsd socket with NETX DUO

why the _tx_thread_rquilish did not do the " TX_THREAD_SYSTEM_RETURN_CHECK(combined_flags)" check before enter the scheduler?

HI folks:

on many occasions before enter the scheduler, the threadx software flow would involke the " TX_THREAD_SYSTEM_RETURN_CHECK(combined_flags)" the check whether it is feasible to call _tx_thread_system_return() to
get the scheduler service.
but it seems the _tx_thread_relinquish is a exception and ony one exception, it just do the _tx_thread_system_return without any check.

is this robust if user application call disable the preempt before calling the _tx_thread_relinquish ? can this be a problem?

thank you!

How to integrate for deliverable?

I am engineer of Nuvoton and am evaluating porting azure rtos onto cortex-m4 series chips.

About integration for deliberable, does azure rtos have its own build system and define directory structure for vendors like Mbed OS to integrate into? Or it exists as library and vendors integrate it into their own SDK?

Require documentation for undefined reference to `_tx_initialize_low_level'

EXPLANATION

1. I compiled threadx in a different folder using the documentation

$ cmake -Bbuild -DCMAKE_TOOLCHAIN_FILE=cmake/cortex_m4.cmake -GNinja .
$ cmake --build ./build

2. Proceeded to add tx_api.h, tx_port.h and libthreadx.a to the threadx folder of my Minimal STM32 Project

3. Updated CMake like so

# Add Threadx
target_include_directories(${USER_PROJECT_TARGET} PRIVATE threadx)
target_link_directories(${USER_PROJECT_TARGET} PRIVATE threadx)
target_link_libraries(${USER_PROJECT_TARGET} PRIVATE threadx)

4. CMake generates the project successfully

5. Updated main.c

TX_THREAD my_thread;
void my_thread_entry(ULONG thread_input) {
  while (1) {
    uart_interrupt__write_string(&uart_interrupt_config,
                                 "Hello from Interrupt\r\n");
    tx_thread_sleep(100);
  }
}

void tx_application_define(void *first_unused_memory) {

  /* Create my_thread! */
  tx_thread_create(&my_thread, "My Thread", my_thread_entry, 0x1234,
                   first_unused_memory, 1024, 3, 3, TX_NO_TIME_SLICE,
                   TX_AUTO_START);
}

int main(void) {

  // UART Config
  main__uart_init();
  main__uart_interrupt_init();

  // uart__write_string(&uart_config, "Hello World\r\n");
  // _spin_delay(1000 * 1000);
  uart_interrupt__write_string(&uart_interrupt_config,
                               "Hello from Interrupt\r\n");

  tx_kernel_enter();

  while (1) {
  }

  return 0;
}

5. ERROR when running

cmake --build build

D:\Code\threadx\threadx\build/../common/src/tx_initialize_kernel_enter.c:117: undefined reference to `_tx_initialize_low_level'

I took a look at the above-mentioned function used in this example Getting Started STM32L4 Example

@VOID   _tx_initialize_low_level(VOID)
@{
    .global  _tx_initialize_low_level
    .thumb_func
_tx_initialize_low_level:
@
@    /* Disable interrupts during ThreadX initialization.  */
@
    CPSID   i
@
@    /* Set base of available memory to end of non-initialised RAM area.  */
@     
    LDR     r0, =_tx_initialize_unused_memory       @ Build address of unused memory pointer
    LDR     r1, =__RAM_segment_used_end__           @ Build first free address   
    ADD     r1, r1, #4                              @ 
    STR     r1, [r0]                                @ Setup first unused memory pointer
@
@    /* Setup Vector Table Offset Register.  */
@    
    MOV     r0, #0xE000E000                         @ Build address of NVIC registers
    LDR     r1, =g_pfnVectors                       @ Pickup address of vector table  
    STR     r1, [r0, #0xD08]                        @ Set vector table address   
@
@    /* Set system stack pointer from vector value.  */
@
    LDR     r0, =_tx_thread_system_stack_ptr        @ Build address of system stack pointer
    LDR     r1, =g_pfnVectors                       @ Pickup address of vector table
    LDR     r1, [r1]                                @ Pickup reset stack pointer
    STR     r1, [r0]                                @ Save system stack pointer
@
@    /* Enable the cycle count register.  */
@
    LDR     r0, =0xE0001000                         @ Build address of DWT register
    LDR     r1, [r0]                                @ Pickup the current value
    ORR     r1, r1, #1                              @ Set the CYCCNTENA bit
    STR     r1, [r0]                                @ Enable the cycle count register 
@
@    /* Configure SysTick for 100Hz clock, or 16384 cycles if no reference.  */
@
    MOV     r0, #0xE000E000                         @ Build address of NVIC registers
    LDR     r1, =SYSTICK_CYCLES
    STR     r1, [r0, #0x14]                         @ Setup SysTick Reload Value
    MOV     r1, #0x7                                @ Build SysTick Control Enable Value
    STR     r1, [r0, #0x10]                         @ Setup SysTick Control

@
@    /* Configure handler priorities.  */
@
    LDR     r1, =0x00000000                         @ Rsrv, UsgF, BusF, MemM
    STR     r1, [r0, #0xD18]                        @ Setup System Handlers 4-7 Priority Registers

    LDR     r1, =0xFF000000                         @ SVCl, Rsrv, Rsrv, Rsrv
    STR     r1, [r0, #0xD1C]                        @ Setup System Handlers 8-11 Priority Registers
                                                    @ Note: SVC must be lowest priority, which is 0xFF

    LDR     r1, =0x40FF0000                         @ SysT, PnSV, Rsrv, DbgM
    STR     r1, [r0, #0xD20]                        @ Setup System Handlers 12-15 Priority Registers
                                                    @ Note: PnSV must be lowest priority, which is 0xFF
        
@
@    /* Return to caller.  */
@    
    BX      lr 
@}
@

REQUIREMENT

If possible I would like to get an example for the above function in C since my startup code and interrupt vector table (entire project) has been written in C. Link to my Minimal Projects for STM32

If possible I would also like to know if there is more documentation to learn about the internal working of Threadx.

No makefile under threadx/ports_smp/linux/gnu/example_build?

Hi Admin,

It looks like there is no Makefile uploaded for threadx/ports_smp/linux/gnu/example_build?

Cheers.

how to build cortex-a7 port?

when i config the cortex_a7 port like your readme show, just replease the m4 to a7
cmake -Bbuild -DCMAKE_TOOLCHAIN_FILE=cmake/cortex_a7.cmake -GNinja .
it report failure for this:
ke-3.15/Modules/CMakeDetermineSystem.cmake:99 (message):
Could not find toolchain file: cmake/cortex_a7.cmake
Call Stack (most recent call first):
CMakeLists.txt:4 (project)

CMake Error: CMake was unable to find a build program corresponding to "Ninja". CMAKE_MAKE_PROGRAM is not set. You probably need to select a different build tool.
CMake Error: CMAKE_C_COMPILER not set, after EnableLanguage
CMake Error: CMAKE_ASM_COMPILER not set, after EnableLanguage
-- Configuring incomplete, errors occurred!

so, could you show me how to compile the a7 port?

is malloc() and free() thread-safe on threadx

is malloc() and free() thread-safe on threadx

wrong checking if thread stack overlaps the other

when you are checking if one stack overlaps the other,
at one point you assume that stack_end is pointing outside the stack:
https://github.com/azure-rtos/threadx/blob/609c75a2e51735fa3ad894e0caef595ab71ba6c9/common_modules/module_manager/src/txm_module_manager_thread_create.c#L159

few lines bellow it you assume that the end of the stack is pointing to part of the stack:
https://github.com/azure-rtos/threadx/blob/609c75a2e51735fa3ad894e0caef595ab71ba6c9/common_modules/module_manager/src/txm_module_manager_thread_create.c#L172
and then you are assuming some weird thing (it is bug, need to be <= not matter what you assume):
https://github.com/azure-rtos/threadx/blob/609c75a2e51735fa3ad894e0caef595ab71ba6c9/common_modules/module_manager/src/txm_module_manager_thread_create.c#L176
and you are not checking the option that:
stack_start < next_thread -> tx_thread_stack_start && next_thread -> tx_thread_stack_end < stack_end