facebook/openbic

BICs (Bridge IC) are standalone devices deployed within a Data Center that enable monitoring a multi-host system using a single BMC device.

OpenBIC is an open software framework to build a complete firmware image for a BridgeIC.

Platform	Status	Description
obat-cb		Artemis Colter Bay
obgt-cc		Grand Teton Cascade Creek
obwc-mb		Waimea Canyon Mainboard
oby3-dl		Yosemite v3 Delta Lake
oby3-vf		Yosemite v3 Vernal Falls
oby35-bb		Yosemite v3.5 Baseboard
oby35-cl		Yosemite v3.5 Crater Lake
oby35-gl		Yosemite v3.5 Great Lakes Board
oby35-hd		Yosemite v3.5 Half Dome
oby35-rf		Yosemite v3.5 Rainbow Falls Board
oby35-ji		Yosemite v3.5 Java Island Board
oby4-sd		Yosemite v4 Santinel Dome Board
oby4-ff		Yosemite v4 Floating Falls
oby4-wf		Yosemite v4 Wailua Falls

Contents

Documentation: https://facebook.github.io/OpenBIC/

Currently supported RTOS

OpenBIC functionality is written using the CMSIS RTOS API as an RTOS wrapper. This allows for RTOS agnostic design and feature implementations.

The currently supported RTOSs are:

• Zephyr

Currently supported Boards

The board configuration files can be found in the configs/ directory.

The currently supported boards are:

• ASPEED AST2600 EVB
• ASPEED AST1030 EVB

Build Instructions

Dependencies

The SDK develop environment is based on Ubuntu 18.04 LTS – 64bits and bash shell. The following tools must be installed on the host machine.

• Reference url: https://docs.zephyrproject.org/2.6.0/getting_started/index.html
• Reference url: https://github.com/AspeedTech-BMC/zephyr

Dependencies minimum required:

Cmake: 3.20.0
Python: 3.6
Devicetree compiler: 1.4.6

Install dependencies:

sudo apt install --no-install-recommends git cmake ninja-build gperf \
ccache dfu-util device-tree-compiler wget \
python3-dev python3-pip python3-setuptools python3-tk python3-wheel xzutils file \
make gcc gcc-multilib g++-multilib libsdl2-dev

Download Zephyr package: Install west, and make sure ~/.local/bin is on your PATH environment variable:

pip3 install --user -U west
echo 'export PATH=~/.local/bin:"$PATH"' >> ~/.bashrc
source ~/.bashrc

Get the application and Zephyr code base from openbic GitHub.

Note: First step will only work after west.yml being merged **

west init -m https://github.com/facebook/OpenBIC zephyrproject
cd zephyrproject
west update

Install the toolchain:

cd ~
wget https://github.com/zephyrproject-rtos/sdkng/releases/download/v0.12.4/zephyr-sdk-0.12.4-x86_64-linux-setup.run

Run the installer, installing the SDK in ~/zephyr-sdk-0.12.4:

chmod +x zephyr-sdk-0.12.4-x86_64-linux-setup.run
./zephyr-sdk-0.12.4-x86_64-linux-setup.run -- -d ~/zephyr-sdk-0.12.4

Build Steps

Clean build application and Zephyr code

cd $zephyrproject/openbic.odm
touch meta-facebook/yv35-cl/CMakeLists.txt
west build -p auto -b ast1030_evb meta-facebook/yv35-cl/

Contributing

Git Hooks

This repository uses clang-format to format all c code. Getting code merged requires that it conforms to the clang-format style file.

The easiest way to do this is to copy the git pre-commit hook from the scripts directory so that the code is automatically formatted whenever code is added to a commit.

cp scripts/hooks/pre-commit .git/hooks/

License

OpenBIC is Apache 2.0 licensed

openbic's Issues

Priority of system workqueue

Hi @rainlinWW,

The system work queue priority is -1 now.
Should we also set CONFIG_SYSTEM_WORKQUEUE_PRIORITY to be same as CONFIG_MAIN_THREAD_PRIORITY?

Thanks,
Yi-Shum

BIC firmware update is unstable

Hi @rainlinWW,

We tested the stability of the BIC firmware update, which was updated 1504 times and failed 208 times.
Have you encountered this problem?

Thanks,
Eason

IPMB transfer function shall be refactored

Owner:
Wiwynn

Request from:
#195

Description:
The function IPMB_TXTask() should be broken out as it is over 300 lines long and tries to handle all
interfaces. It would be better to create separate functions for each interface and not have it as
a large if/else-if/else-if/else type structure.

HSC init

Hi @rainlinWW,

"hsc_init()" doesn't be called by any process.

The "PMON_CONFIG" still use the default setting.

root@bmc-oob:~# bic-util slot1 0x18 0x52 0x05 0x80 0x02 0xD4 14 07

Could you help check this?

Thanks,
Young

Questions about IPMB

Hi @rainlinWW,

We have some questions about IPMB design.

1. In function ipmb_send_response() and ipmb_send_request(), the waiting time to put message into queue is K_forever.
   Should it set a appropriate timeout value?
2. The queue size of ipmb_txqueue and ipmb_rxqueue is 1 and 2.
   Is there any reason to set this size?
3. In ipmb_read(), the mutex lock and mutex unlock function doesn't check the return value.

Thanks,
Yi-Shum

YV3.5 CL: read wrong board revision

Hi @DelphineChiu,

We have an issue on CraterLaker EVT3A. BIC reads wrong board revision(0x00) from CPLD when boot.
This issue can be reproduced using 12V cycle.
It results in incorrect sensor readings from the temperature sensor and HSC.
Do you have the same issue?

Thanks,
Yi-Shum

Include different header of cmsis

Hi @rainlinWW,

The code includes two kinds of cmsis header(cmsis_os.h and cmsis_os2.h).
The value of "osPriorityBelowNormal" is different in these headers, should they all use same header?

Thanks,
Yi-Shum

Questions about PR #108

Hi @Yi-Shum

In PR #108 , is there any issue about malloc ipmi_msg so you have to modify it to declare directly instead?
From our point of view, malloc big size variable like ipmi_msg can reduce memory usage in thread stack, which means we can reduce size of all threads calling this function.

Also, for events that requires delay, suggest using k_work instead of creating extra thread and occupy kernel memory.

[EVT] The release schedule for Y35BCL_EVT2

Hi @rainlinWW,

From "YV3.5_FW_Table_ODMA_2021_1206.xlsl", the next BIC release will be 12/16.

Is that correct?

The next BIC release which include I2C drive patch is more stable for BMC/BIC communication.

We need this version for the next EVT build.

So we want to know the schedule.

Thanks,
Young

HSC power threshold

Hi @rainlinWW,

The UCT of "HSC Input Pwr" is set to 178W, but it's set to 480W in YV3 project.

Our power team stress the HSC power to 480W,

For my understanding, it should be 480W, right?

Thanks,
Young

Add OEM command to read/write BIC register

Hi @DelphineChiu,

We want to add an OEM command to read and write BIC register for debug.
Do you have any suggestion for this?

Thanks,
Yi-Shum

GPIO set questions

Hi @rainlinWW,

We have two questions about gpio settings.

Q1. Open drain pin settings
There's a scenario that OPEN DRAIN pin would set to OUTPUT(Initial direction is INPUT ) while setting it to low. Is this a normal behavior?

p.s. Take GPIO_B6 (FM_S3M_CPU0_CD_INIT_ERROR) as example. In table plat_gpio_cfg[],
{ chip_gpio, 14, ENABLE, DISABLE, GPIO_INPUT, GPIO_LOW, OPEN_DRAIN, GPIO_INT_DISABLE, NULL },

Q2. GPIO initial settings
Why does gpio_set() need to do twice in gpio_init()? If we only keep the second one, would anything goes wrong?

Thanks,
Mouchen

Modify code for sensor reading

Hi @DelphineChiu,

We want to modify the code for sensor reading, including:

1. The member init_args in struct sensor_cfg should only be used in the function DeviceName_init().
   So we want to add a private data member that will be used in other functions such as DeviceName_read().
2. Add the header files for each sensor.
3. Changed ADC amplification calculation from arg0 and arg1 to post_sensor_read_hook and post_sensor_read_args.

Do you have any suggestions for this?

Thanks,
Yi-Shum

Move sensor monitoring changes from main to main_v2

Owner:
Wiwynn

Request from:
#214 , #224

Description:
The optimization code is based on v2022.07.01. After that, the main branch has been phased in some commits related to sensor monitoring. Those changes will be phased in main_v2.

Some declarations of common sensor functions are not matched to their corresponding definitions.

Hi @DelphineChiu

I got some error messages from the Build and Analyze: run-cppcheck task.

Files to check:
common/service/sensor/sensor.c
Errors Found:
common/service/sensor/sensor.c:274:26:Function 'stby_access' argument 1 names different: declaration 'sensor_num' definition 'sensor_number'.
common/service/sensor/sensor.c:279:24:Function 'dc_access' argument 1 names different: declaration 'sensor_num' definition 'sensor_number'.
common/service/sensor/sensor.c:284:26:Function 'post_access' argument 1 names different: declaration 'sensor_num' definition 'sensor_number'.
common/service/sensor/sensor.c:289:24:Function 'me_access' argument 1 names different: declaration 'sensor_num' definition 'sensor_number'.

The root cause should be some declarations don't match their corresponding definition.
For instance,

OpenBIC/common/service/sensor/sensor.c

Lines 272 to 275 in 6e194a7

	bool stby_access(uint8_t sensor_number)
	{
	return true;
	}

OpenBIC/common/service/sensor/sensor.h

Line 219 in 6e194a7

bool stby_access(uint8_t sensor_num);

What would you suggest to handle this issue?

The frequency setting of I2C for standard mode is faster than the criteria

Hi @DelphineChiu

Our EA team measure the I2C bus signal and found that the frequency of I2C[2] (sensor bus) and I2C[5] (VR bus) is 100.8 KHz.

It's faster than the maximum speed of standard mode (100KHz).

Do you also see the symptom and do we have a plan to decrease the frequency setting?

Thanks
Young

OEM command send_interrupt_to_BMC

Hi @rainlinWW,

Quanta is testing ASD function now.
When testing ASD, we need to used OEM command 0x38 0x07 to send GPIO interrupt to BMC , but this command is now used as sensor polling enable.

In YV3, sensor poll enable is 0x38 0x30, and send interrupt to BMC is 0x38 0x07.
Will Wiwynn followed the command used on YV3 in the future?

Thanks,
Eason

The build steps/configs

Hi @rainlinWW,

We found that the released firmware (xxxx.bin) size is much different with UART firmware (uart_xxxx.bin),

For example:
oby35-cl-2022.01.01.bin about 321KB
uart_oby35-cl-2022.01.01.bin about 261KB

We follow https://github.com/facebook/OpenBIC#readme to build.

Both xxxx.bin and uart_xxxx.bin size are almost the same (about 261KB).

Is there any steps/configs we miss?

We just want to make sure our build steps is OK.

Thanks,
Young

GPIO interrupt trigger fail

Hi @rainlinWW,

In irq_callback(), gpio_isr_info is a global variable.
So if two GPIO interrupts are triggered at the same time, only one will be added to the work queue.

The GPIO trigger interrupt flow is as follows:
irq_callback() -> gpio_isr_handler() -> interrupt callback function defined in plat_gpio_cfg[]
Could we remove the function gpio_isr_handler() and directly add the GPIO callback function into workqueue?

Thanks,
Eason

Add OEM platform command

Hi @rainlinWW,

In order to debug or get some server's info while BIC running, we have a suggestion to add an OEM platform command in BIC console which may includes GPIO get/set or other topics in further.
Is that ok for you?

p.s. Bellow is one of the example from current work.

Thanks,
Mouchen

DIMM PMIC sensors problem

Hi @DelphineChiu,

We found a problem about DIMM PMIC power sensors. There's an error setting in init_args "pmic_init_args" which should be
pmic_init_arg pmic_init_args[] = {
[0] = { .is_init = false, .smbus_bus_identifier = 0x00, .smbus_addr = 0x90 },
[1] = { .is_init = false, .smbus_bus_identifier = 0x00, .smbus_addr = 0x98 },
[2] = { .is_init = false, .smbus_bus_identifier = 0x00, .smbus_addr = 0x9C },
[3] = { .is_init = false, .smbus_bus_identifier = 0x01, .smbus_addr = 0x90 },
[4] = { .is_init = false, .smbus_bus_identifier = 0x01, .smbus_addr = 0x98 },
[5] = { .is_init = false, .smbus_bus_identifier = 0x01, .smbus_addr = 0x9C }
};

Thanks,
Mouchen

Need a reference Y35BCL.elf for QEMU testing

For QEMU testing, it would be great if there was a public reference image to test against, so that people don't have to build images themselves. I built an image and created a release in my fork, if you just add this to the release assets for the 2022.13.01 release I think it would be more official than linking to my forked repo.

https://github.com/peterdelevoryas/OpenBIC/releases/tag/oby35-cl-2022.13.01

Output from upstream qemu:

$ ./build/qemu-system-arm -machine ast1030-evb -kernel Y35BCL.elf -serial mon:stdio -display none
[00:00:00.004,000] <inf> usb_dc_aspeed: select ep[0x81] as IN endpoint
[00:00:00.005,000] <inf> usb_dc_aspeed: select ep[0x82] as IN endpoint
[00:00:00.005,000] <wrn> usb_dc_aspeed: pre-selected ep[0x1] as IN endpoint
[00:00:00.005,000] <wrn> usb_dc_aspeed: pre-selected ep[0x2] as IN endpoint
[00:00:00.005,000] <inf> usb_dc_aspeed: select ep[0x3] as OUT endpoint
*** Booting Zephyr OS build v00.01.04  ***
Hello, wellcome to yv35 craterlake 2022.13.1


uart:~$ Failed to read expansion present from CPLD
I2C 0 master write retry reach max
Failed to set class type to CPLD)
Failed to read board ID from CPLD
BIC class type(class-1), 1ou present status(0), 2ou present status(0), board revision(0xf)
Not found change threshold sensor
Not found change threshold sensor
Not found change threshold sensor
Not found change threshold sensor
Not found change threshold sensor
Not found change threshold sensor
Not found change threshold sensor

The feature of reading VR sensor for TI and Infineon

Hi @rainlinWW,

Do we have a plan to implement following features?

1. sensor reading for TI VR
2. sensor reading for Infineon VR
3. stop only VR sensor polling for VR update (NetFn 0x38, Command 0x14)
   Currently BMC use stop all sensor polling for updating Infineon VR (NetFn 0x38, Command 0x30)

Thanks
Young

Nrw

Wrong order of return value of CMD_OEM_GET_GPIO command

Hi @rainlinWW,

The return value of CMD_OEM_GET_GPIO in Zephyr is different with freeRTOS.
In FreeRTOS BIC, bit 7 is the value of GPIOA0 and bit 0 is the value of GPIOA7.
In Zephyr BIC, bit 0 is the value of GPIOA0 and bit 7 is the value of GPIOA7, and this is same as YV3.

This different causes OS fail to start.

Thanks,
Eason

The known issue "VR power abnormal assertion when system power on. (VCCD POUT)"

Hi @DelphineChiu,

When system DC cycle, the current will drop to 0.

It has a chance to get the negative power value (0xFF 0xFF).

Do we have a plan to filter the negative value for VR power and current like YV3?

Thanks
Young

Move relevant Yv3.5 BB code to common.

The initial commit from this PR [#111] needs to have duplicate code refactored into the common libraries

As you mentioned., The biggest things I noticed were ipmi related such as code in:

• ipmi/usb_ipmi.c
• ipmi/plat_ipmi.c
• ipmi/include/fw_update.h (These seem to be identical between the 2)

Questions about TEMP_SSD0 (0x0D)

Hi @rainlinWW,

We have a question about sensor reading on TEMP_SSD0 (0x0D). Why there's no ".cache" value given while sensor reading back with 0x80. I know that this scenario might be happened sometime. But in this case, BIC sensor polling might read back last(including correct value or even 0xFF if read failed last time) or unknown value which cause wrong reading issue.

Thanks,
Mouchen

Questions about GPIO platform code

Hi @rainlinWW

In "name_gpioQ" macro from plat_gpio.h. There's no "Reserve_GPIOQ2" pin. Is that right?

Thanks,
Mouchen

Aspeed Zephyr I2C driver overwriting auto-NAK bit?

https://github.com/AspeedTech-BMC/zephyr/blob/db3dbcc9c52e67a47180890ac938ed380b33f91c/drivers/i2c/i2c_aspeed.c#L1823-L1826

This might be a bug

IPMB_TXTask wait forever when bridge message from host fail

Hi @rainlinWW,

We have an issue about IPMB_TXTask.
If BMC and host reboot at the same time, the bridge message from host will fail with the maximum number of retries.
In IPMB_TXTask, it will respond CC_NODE_BUSY to KCS and wait forever in function ipmb_send_response().

Thanks,
Yi-Shum

Event data of FRB3/CATERR

Hi @rainlinWW,

The value of FRB3, IERR and MCERR is different from Yv3 in sdr.h.
Should we modify it to be the same as Yv3?

event data	Yv3	Yv3.5
IPMI_SDR_SENSOR_SPEC_EVENT_PROCESSOR_IERR	0x00	0x01
IPMI_SDR_SENSOR_SPEC_EVENT_PROCESSOR_FRB3	0x04	0x10
IPMI_SDR_SENSOR_SPEC_EVENT_PROCESSOR_MCERR	0x0B	0x08

Thanks,
Eason

BIC cold-reboot issue

Hi @rainlinWW,

We recently encountered an BIC reboot issue. Host would hang-up while sending cold-reboot command(0x06,0x02). Have you seen this problem before?

Thanks,
Mouchen

OpenBIC MCTP/PLDM implementation

Hi @rainlinWW,

Because another new project needs to support MCTP and PLDM, do you have a development plan?
If not, Quanta will start to develop it to meet the project schedule.

Thanks,
Eddie

I2C master write read question

Hi @DelphineChiu

We have a question about master write read command (NF:0x06, CMD:0x52).

In yv3, command's bus-id uses 0-base, but 1-base in yv3.5. Is that reasonable for you?

By the way, 0-base is specified in ipmi spec.

Thanks,
Mouchen

Schedule for when I3C will be implement

Hi @rainlinWW ,

Do you have a schedule for when I3C will be implemented on the bus between BIC and BMC?

Thanks,
Yi-Shum

IPMI get sensor reading

Hi @rainlinWW,

The get sensor reading commands (0x04 0x2d, 0x38 0x23) reply completion code 0xC0 (Node Busy) when the sensor is unreadable.
But in YV3, BIC reply completion code 0x00 with three response data 0x00 0x00 0xE0.
Should we follow YV3?

Thanks,
Eason

IPMB RX polling delay and TX sleep time

Hi @rainlinWW,

When we run ASD cscript on BMC, it takes more time than YV3, because IPMB TX and RX will sleep 10 milliseconds after sending and receiving a packet.
If we reduce the sleep time, it will improve.

What is the reason for waiting 10 milliseconds on IPMB TX and RX?

Thanks,
Eason

Let ME cold reset before accessing PMIC

Hi @LoraLin1

In this PR #278, it will cold reset ME before setting PMIC config.

Is this action necessary? What's the purpose?

We got some issues caused by ME cold reset.

Do you have the same problem?

EX:
[IEH] error found at IEH(S:0x0 B:0xFE D:0x0 F:0x3) Sev: IEH CORRECT ERROR
[IEH] ErrorStatus 0x40, MaxBitIdx 0x1D
[IEH] BitIdx 0x6, ShareIdx 0x0
[IEH] error device is (S:0x0 B:0x0 D:0x0 F:0x4) BitIdx 0x6, ShareIdx 0x0 [IEH] error found at IEH(S:0x0 B:0x0 D:0x0 F:0x4) Sev: IEH CORRECT ERROR
[IEH] ErrorStatus 0x1, MaxBitIdx 0xA
Clearing Local Error Status for Error Source 5, Error Severity 1, Error Status 0x4000, Device Type SPD I3C Bus
ERROR: Class:3000000; Subclass:70000; Operation: 1008

Thanks
Young

1ou BIC update fail

Hi @DelphineChiu,

Have you encountered the problem of failing to update 1ou BIC from BMC when DC on?

When updating 1ou BIC, the expected flow of motherboard BIC is:
Get bridge command from BMC -> send update message to 1ou BIC -> insert this message to node
-> get response from 1ou BIC -> find message from node, send response to BMC if found

This issue is occurred when the step 3 "insert this message to node" is later than the step 5 "find message in node".
It cause BMC timeout and send same packet again, then 1ou BIC update will fail.

We will swap the order of step 2 and 3 to solve this problem.
Do you have any suggestion for this?

Thanks,
Yi-Shum

Sensor ID of FIO Temp

Hi @rainlinWW,

We want to confirm the ID of SENSOR_NUM_TEMP_TMP75_FIO(0x03), because it would affect fscd.
The ID of this sensor is "FIO Temp" now and had been modified several times since POC.

Thanks,
Eason

[EVT] The release schedule for Y35BCL_EVT3

Hi @rainlinWW,

The fix for FRU read #89 has been merged.

This will gate both your and our EVT build.

As I know, next week will release 2021.52.01, right?

Thanks
Young

BIC warm reset error

Hi @rainlinWW,

BIC does not work after warm reboot, but cold reboot works normally.
Have you run into this problem?

Thanks,
Eason

Get GPIO command (netfn 0x38 command 0x3) returns wrong value

Hi @DelphineChiu,

The return value of get GPIO OEM command(netfn 0x38 command 0x3) is wrong.
It can cause unexpected behavior.

Thanks,
Yi-Shum