fast-codesign/opentsn3.0

an opensource project to enable TSN research

opentsn3.0's Issues

《OpenTSN4.0》的项目部署疑问

尊敬的OpenTSN开发者您好！
由于没有找到您的联系方式，因此只能在这里向您提问。
我的疑问是：
1.OpenTSN的软件部分是在risc-v上跑的，该代码是为一个“修改版的Cv32e40p (RV32IMC) 处理器核心上编写的，请问这套risc-v处理器核心可以在哪里获取到吗？
2.我有很多基于Zynq UltraScale+ MPSoC的开发板，能否将整套代码部署上去呢？还是一定要购买《从0深入OpenTSN4.0_v1.5》中提及的<OpenTSN 专用 FPGA 矩阵卡>才可以使用整套OpenTSN呢？

我想使用OpenTSN这款开源的工程，配置TSN交换机，通过修改部分协议达到研究目的，我的整个课题都仅作为研究目的，不涉及任何商业。

感谢您的耐心观看，期待您的答复！

FAST Framework for OpenTSN

Good Morning,

I am a student of the University of Bologna, currently enrolled in the Computer science master degree, and I am currently working to my master thesis.

We would like to replicate the test-bench you did in this paper ( https://link.springer.com/article/10.1007/s42045-020-00029-8 ),

How can we obtain the FAST framework and the hardware?
We would like to use a NetLeap Board, which has a different Zynq, is it possible to port the project?

Kind Regards,

Marco Negrini